GaN Wire Growth on Silicon via Low-Temperature Deposition
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Solution Overview
Problem
The controlled manufacturing of semiconductor structures, particularly gallium nitride (GaN) wires on silicon surfaces, faces challenges due to the reactivity between gallium and silicon, leading to interface degradation and the need for protective layers or lengthy adaptation procedures, which are not ideal for mass production.
Innovation Solution
A method involving physical vapor phase deposition of a first material with low temperature to form a layer on specific zones, followed by nitriding the free zones to reduce reactivity, allowing selective growth of gallium nitride structures without the need for an aluminum nitride layer or a hard mask, enabling parallel processing across large surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an aluminum nitride protective layer is used to prevent silicon etching by gallium, then interface degradation is prevented, but electrical conductivity between substrate and structures is poor
Solution Approach 1:
The patent changes the temperature parameter during gallium deposition, maintaining it below 600°C. This temperature control prevents silicon etching while allowing direct gallium-silicon contact, thereby maintaining both interface quality and electrical conductivity without requiring an aluminum nitride layer
Solution Approach 2:
The patent removes the aluminum nitride protective layer from the process entirely. By extracting this intermediate layer and directly controlling the deposition temperature, the solution eliminates the electrical conductivity problem while maintaining interface quality through temperature management alone
2Manufacturing precision
If sequential surface modification techniques are used to achieve selective growth, then nucleation control is improved, but manufacturing time increases significantly for large surfaces
Solution Approach 1:
The patent applies a mask layer to the substrate surface before gallium deposition. This preliminary action defines the formation zones in advance, allowing parallel processing across the entire substrate surface during subsequent steps, thereby maintaining nucleation control while dramatically reducing total manufacturing time
Solution Approach 2:
The patent segments the substrate surface into formation zones and non-formation zones using a mask layer. This segmentation allows selective deposition only in formation zones while enabling parallel processing across multiple zones simultaneously, resolving the contradiction between precision control and manufacturing speed
3Productivity
If a mask layer is used to achieve selective growth, then parallel processing is enabled, but additional mask removal steps are required
Solution Approach 1:
The patent uses a sacrificial organic mask layer that is intentionally designed to be removed easily after serving its purpose. This disposable mask approach enables parallel processing during deposition while keeping the overall process simple, as the mask removal is a straightforward step that does not add significant complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables controlled, selective growth of semiconductor structures with improved interface quality and reduced reactivity issues, suitable for mass production without the drawbacks of existing methods, such as the use of aluminum nitride layers or cumbersome mask removal processes.
Implementation Method 1
The step of forming the layer of a first material includes a sub-step of deposition of the first material of the physical vapor phase deposition type
Implementation Method 2
followed by nitriding the free zones to reduce reactivity
Implementation Method 3
This lowers the nucleation energy of the material to be deposited in the formation zones, thereby promoting the growth of said material in the modified areas
Implementation Method 4
the phenomenon of etching of silicon (Si) by gallium (Ga) competes with the phenomenon of crystallization of the material to be deposited
Data Source
Figure 1a~1d
Figure 1e~2b
Figure 2c~3b
AI summary
A method for producing at least one semi-conductive structure (130) on the surface (105) of a support (100) of which the surface comprises silicon. The method comprises the steps consisting of providing the support (100), forming, in contact with an area (101) of the surface (105), called the formation area, a layer (120) of a first material, the remainder (102) of the surface (105), called the free area, remaining free of the first material, the dimensions of the formation area (101) and the first material being suitable for forming the structure (130), the first material comprising gallium, the formation of said layer (120) taking place at a temperature lower than 600°C, and of forming the structure (130) in contact with the layer (120).