GaP Channel Memory Arrays for Data Retention
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Solution Overview
Problem
Current memory arrays face challenges in efficiently utilizing channel materials with large bandgaps for vertically-stacked memory cells, particularly in maintaining charge carrier mobility and compatibility with silicon lattices, which affects the retention and storage of data in nonvolatile memory cells.
Innovation Solution
The use of gallium phosphide (GaP) as channel material in transistors within vertically-stacked memory cells, providing a large bandgap and reasonable charge carrier mobility, along with a configuration where transistors are configured as rings surrounding digit lines, enhances the memory array's performance by improving data retention and storage capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional channel materials are used in vertically-stacked memory cells, then manufacturing compatibility is maintained, but data retention and charge carrier mobility are insufficient
Solution Approach 1:
The patent changes the fundamental parameter of channel material bandgap energy by transitioning from conventional silicon-based materials to wide-bandgap materials like gallium phosphide (GaP) and gallium nitride (GaN). This parameter change enables improved data retention and charge carrier mobility in vertically-stacked memory cells while maintaining compatibility with existing semiconductor manufacturing processes through established epitaxial growth techniques.
Solution Approach 2:
The patent employs composite material structures by integrating wide-bandgap semiconductor layers (GaP, GaN) with silicon-based substrates and interlayer dielectric materials. This composite approach allows the channel region to benefit from wide-bandgap properties for enhanced data retention, while the overall structure remains compatible with conventional silicon manufacturing infrastructure.
2Quantity of substance
If vertically-stacked memory cell configuration is implemented, then memory density is increased, but charge carrier mobility and data retention are compromised
Solution Approach 1:
The patent addresses the charge carrier mobility issue in vertically-stacked configurations by changing the material parameter of bandgap energy. The wide-bandgap materials (GaP, GaN) provide superior charge carrier mobility compared to conventional materials, enabling the vertically-stacked architecture to achieve both high memory density and maintained charge transport performance.
3Reliability
If wide-bandgap channel materials are used, then data retention is improved, but charge carrier mobility may be reduced
Solution Approach 1:
The patent optimizes the bandgap energy parameter by selecting specific wide-bandgap materials (GaP with ~2.26 eV bandgap, GaN with ~3.4 eV bandgap) that balance data retention improvement with acceptable charge carrier mobility. These material selections represent carefully chosen parameter values that achieve the desired trade-off between retention and speed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
GaP channel material in transistors of vertically-stacked memory cells improves data retention and storage efficiency by offering a large bandgap and compatible charge carrier mobility, addressing the limitations of existing channel materials and enhancing the overall performance of memory arrays.
Implementation Method 1
providing a large bandgap and reasonable charge carrier mobility
Implementation Method 2
providing a large bandgap and reasonable charge carrier mobility
Implementation Method 3
Each of the transistors has channel material with a bandgap greater than 2 electron-volts
Data Source
AI summary
Some embodiments include a memory array having vertically-stacked memory cells. Each of the memory cells includes a transistor coupled with a charge-storage device, and each of the transistors has channel material with a bandgap greater than 2 electron-volts. Some embodiments include a memory array having digit lines extending along a vertical direction and wordlines extending along a horizontal direction. The memory array includes memory cells, with each of the memory cells being uniquely addressed by combination of one of the digit lines and one of the wordlines. Each of the memory cells includes a transistor which has GaP channel material. Each of the transistors has first and second source/drain regions spaced from one another by the GaP channel material. The first source/drain regions are coupled with the digit lines, and each of the memory cells includes a capacitor coupled with the second source/drain region of the associated transistor. Other embodiments are disclosed.