Gate-All-Around Semiconductor Device Bulk Substrate Fin Structure
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Solution Overview
Problem
Conventional semiconductor devices with finFET structures face challenges in reducing short channel effects and increasing operating current due to limited channel region usage and higher fabrication costs, particularly when using silicon-on-insulator substrates.
Innovation Solution
The development of semiconductor devices with a gate-all-around (GAA) structure using a bulk semiconductor substrate, where a common gate electrode encloses and is insulated from all lateral, upper, and lower surfaces of fins, increasing the channel region and operating current, and potentially reducing fabrication costs by eliminating the need for silicon-on-insulator substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional finFET structure is used, then fabrication cost increases due to silicon-on-insulator substrate requirement, but channel region usage is limited
Solution Approach 1:
The patent replaces expensive silicon-on-insulator substrates with bulk semiconductor substrates, using a cost-effective alternative material that achieves the same functional goal of supporting the fin structure without requiring the expensive SOI substrate
Solution Approach 2:
The gate electrode transitions from planar contact (conventional finFET) to three-dimensional wraparound contact (GAA structure), enclosing the fin channel from lateral, upper, and lower surfaces to maximize channel region utilization
2Reliability
If conventional finFET structure is used, then operating current is limited due to restricted channel region, but short channel effects are reduced
Solution Approach 1:
The gate electrode wraps around the fin channel in three dimensions, contacting lateral, upper, and lower surfaces, thereby increasing the effective channel area and operating current while maintaining short channel effect control through the enclosed structure
Solution Approach 2:
The gate electrode is positioned within and surrounds the fin channel structure, with the gate insulating layer nested between the gate electrode and fin surfaces, creating a nested configuration that maximizes electric field control over the channel region
3Power
If gate electrode encloses entire fin surfaces, then operating current increases, but device complexity increases
Solution Approach 1:
Multiple gate electrode portions that would otherwise be separate structures are merged into a single continuous gate electrode that wraps around the fin channel, simplifying the device structure while achieving three-dimensional gate control
Solution Approach 2:
The single gate electrode structure performs multiple functions by contacting lateral, upper, and lower fin surfaces simultaneously, providing comprehensive channel control and maximizing operating current through unified multi-surface contact
Data Source
AI summary
Semiconductor devices having a gate-all-around (GAA) structure capable of higher operating performance may be provided. A semiconductor device may include a semiconductor substrate, at least one gate electrode, and at least one gate insulating layer. The semiconductor substrate may have a body, at least one supporting post protruding from the body, and at least one pair of fins separated from the body, wherein both ends of each fin of the at least one pair of fins are connected to and supported by the at least one supporting post. The at least one gate electrode may enclose a portion of at least one fin of the at least one pair of fins of the semiconductor substrate, and may be insulated from the semiconductor substrate. The at least one gate insulating layer may be interposed between the at least one gate electrode and the at least one pair of fins of the semiconductor substrate.