Gate-Boosted NFET LDO Regulator With Low Dropout and Low Ripple
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Solution Overview
Problem
Low dropout (LDO) regulators face challenges in achieving low voltage drop and stability due to the use of p-type field effect transistors (PFETs) and n-type field effect transistors (NFETs), with PFETs causing loop instability and NFETs limiting regulated voltage, while charge pumps introduce ripples in the output voltage.
Innovation Solution
A voltage booster is integrated between the error amplifier and the gate of the pass NFET, boosting the output voltage to reduce the voltage drop and improve efficiency, using a voltage booster configuration that includes a charge pump controller and capacitors to generate a boosted voltage with minimal ripple.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a charge pump is used to boost voltage in an LDO regulator, then the voltage drop is reduced and power efficiency is improved, but ripples are introduced in the output voltage
Solution Approach 1:
A voltage booster circuit is introduced as an intermediary component between the error amplifier and the pass transistor gate. This voltage booster uses capacitors and switches to boost the error amplifier output voltage without using a traditional charge pump, thereby achieving low voltage drop while minimizing output ripple through careful circuit design and compensation
2Loss of energy
If the voltage drop between VDD and Vreg is reduced to enhance power efficiency, then energy loss is decreased, but loop stability may be compromised
Solution Approach 1:
The error amplifier continuously monitors the output voltage through feedback and adjusts the voltage booster control signal to maintain loop stability. The feedback mechanism ensures that the pass transistor remains properly regulated even with the reduced voltage drop, preserving loop stability while achieving lower energy loss
3Object-generated harmful factors
If compensation capacitors are reduced in size to minimize ripple, then the circuit complexity is reduced, but voltage regulation stability may be affected
Solution Approach 1:
The voltage booster circuit changes the operating parameters by boosting the gate voltage of the pass transistor, allowing the use of smaller compensation capacitors. This parameter change enables the circuit to achieve both reduced ripple and maintained stability through altered voltage levels rather than relying solely on large capacitor values
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for a lower voltage drop between VDD and Vreg, enhancing power efficiency and stability by reducing the need for large compensation capacitors and minimizing ripple in the regulated output voltage.
Implementation Method 1
a voltage booster configured to boost an output voltage of the amplifier to generate a boosted voltage
Data Source
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AI summary
In certain aspects, a voltage regulator includes a pass transistor having a drain coupled to an input of the voltage regulator, a source coupled to an output of the voltage regulator, and a gate. The voltage regulator also includes an amplifier having a first input coupled to a reference voltage, a second input coupled to a feedback voltage, and an output, wherein the feedback voltage is approximately equal to or proportional to a voltage at the output of the voltage regulator. The voltage regulator further includes a voltage booster having an input coupled to the output of the amplifier and an output coupled to the gate of the pass transistor, wherein the voltage booster is configured to boost a voltage at the input of the voltage booster to generate a boosted voltage, and to output the boosted voltage at the output of the voltage booster.