Display Device Gate Bridges Zigzag Data Lines

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Solution Overview

Problem

Parasitic capacitance between adjacent data lines in display devices causes undesired coupling, leading to image quality deterioration such as stain defects.

Innovation Solution

A display device configuration with a zigzag pattern of scan gate lines and data lines, where two data lines are positioned between each pair of pixels, minimizing parasitic capacitance effects by reducing coupling between adjacent data lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data lines are positioned adjacent to each other to increase pixel density, then productivity is improved, but parasitic capacitance coupling between data lines increases causing image quality deterioration

Engineering Contradiction:
Improvepixel densityVSAvoidparasitic capacitance coupling
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces gate bridges that create an asymmetric layout pattern where data lines are alternately positioned between pixels in different rows. Specifically, first data lines are positioned between first pixels in a first row, while second data lines are positioned between second pixels in a second row, breaking the symmetric adjacent positioning that causes parasitic capacitance coupling.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent resolves the data line positioning problem by transitioning from a one-dimensional horizontal arrangement to a two-dimensional zigzag pattern. Data lines extend not only horizontally between pixels but also vertically between rows, creating a staggered configuration that increases spatial separation and reduces electromagnetic coupling while maintaining high pixel density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If scan gate lines are extended to cover entire pixel rows, then ease of operation is improved, but device complexity increases due to additional gate bridges

Engineering Contradiction:
Improvescan signal transferVSAvoidgate bridge structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent divides the scan gate line into multiple segments by introducing gate bridges at specific intervals. Instead of using a single continuous scan gate line, the structure is segmented into first scan gate lines and second scan gate lines that are electrically connected through gate bridges, allowing independent control and reducing overall complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate bridges serve multiple functions simultaneously: they electrically connect scan gate lines across different rows, provide pathways for scan signals to reach pixels in alternating patterns, and enable the zigzag data line configuration. This multi-functionality reduces the need for additional separate components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11195466B2Display device having gate bridges connecting scan gate lines to pixels and method for driving the same
Publication Date: 2021.12.07 SAMSUNG DISPLAY CO LTD
  • US11195466B2 patent drawing
  • US11195466B2 patent drawing
  • US11195466B2 patent drawing

AI summary

Example embodiments of the present disclosure provide a display device including: a plurality of pixels; a first scan gate line and a second scan gate line configured to transfer scan signals to a first pixel row of the pixels; a plurality of first gate bridges connected with the first scan gate line to transfer the scan signals to a plurality of first pixels at the first pixel row; a plurality of second gate bridges connected with the second scan gate line to transfer the scan signals to a plurality of second pixels at the first pixel row; a plurality of first data lines configured to supply a plurality of data voltages corresponding to the first pixels; and a plurality of second data lines configured to supply a plurality of data voltages corresponding to the second pixels, wherein two of the first data lines are positioned between two first pixels corresponding thereto, and two of the second data lines are positioned between two second pixels corresponding thereto.