Gate Buffer Circuit for Reliable Power Transistor Turn-Off
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Solution Overview
Problem
In existing semiconductor integrated circuit devices, the pull-down transistor fails to sufficiently turn off the power semiconductor element during specific voltage thresholds, leading to sub-threshold current flow due to the larger area of the power semiconductor element compared to the pull-down transistor.
Innovation Solution
Incorporating a buffer circuit that converts the on-signal level from the threshold circuit into a level capable of turning on the pull-down semiconductor element, ensuring it can operate to turn off the power semiconductor element, even when the gate signal voltage is below the threshold of the pull-down transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the power semiconductor element has a larger area to handle higher current, then the current handling capability is improved, but the pull-down transistor cannot sufficiently turn off the power semiconductor element leading to sub-threshold current flow
Solution Approach 1:
A buffer circuit is introduced as an intermediary between the threshold circuit and the pull-down transistor. The buffer circuit converts the on-signal level from the threshold circuit into a level capable of turning on the pull-down transistor, ensuring it can operate to turn off the power semiconductor element even when the gate signal voltage is below the threshold of the pull-down transistor.
Solution Approach 2:
The buffer circuit changes the voltage level parameter of the control signal. It converts the on-signal level from the threshold circuit into a higher level that is sufficient to turn on the pull-down transistor, thereby changing the operating parameters to achieve reliable turn-off of the power semiconductor element.
2Use of energy by moving object
If the gate signal voltage is kept low during off-state, then the power consumption is reduced, but the pull-down transistor cannot turn on sufficiently to stop current flow
Solution Approach 1:
The buffer circuit acts as a mediator that decouples the gate signal voltage level from the pull-down transistor activation requirement. It allows the gate signal to remain at a low voltage level for power savings while the buffer circuit provides the necessary high voltage level to turn on the pull-down transistor when needed.
Solution Approach 2:
The control function is segmented into two parts: the threshold circuit that monitors the gate signal voltage and generates an on-signal, and the buffer circuit that converts this on-signal into the appropriate voltage level for the pull-down transistor. This segmentation allows independent optimization of power consumption and turn-off reliability.
Data Source
AI summary
A buffer circuit is provided between a gate terminal of a pull-down transistor and a threshold circuit receiving a gate signal as an input signal. A voltage applied to an output terminal of a power semiconductor element from an external battery power supply is supplied to the buffer circuit through a resistive element. The buffer circuit converts the level of an on-signal output from the threshold circuit into a voltage higher than the threshold of the pull-down transistor, so that the pull-down transistor operates surely to turn off the power semiconductor element even when the level of the gate signal is low. Thus, there is provided a semiconductor integrated circuit device having a power semiconductor element which can be turned off by sure operation of a pull-down semiconductor element.