Gate Cap Protection Layer for Semiconductor Contact Etch
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor device manufacturing is the undesirable loss of protective gate cap layers and sidewall spacers during the formation of self-aligned contacts, which complicates the process and increases the aspect ratio of contact openings, making gate etching and spacer etching more difficult.
Innovation Solution
The method involves recessing the gate and spacer structures to form a spacer/gate cap recess, creating a gate cap layer with a thickness less than the recess depth, and forming a protection layer on the gate cap layer to prevent material loss during the contact etch process, ensuring the gate cap layer remains protected.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If self-aligned contacts are formed by removing dielectric material between gate electrode structures, then contact alignment is improved, but gate cap layer and sidewall spacer material is consumed during the etch process
Solution Approach 1:
The patent applies preliminary action by forming an etch stop layer between the gate cap layer and the dielectric material before contact formation. This etch stop layer is deposited in advance to prevent the consumptive etching of the gate cap layer during self-aligned contact formation, thus preserving the gate cap material while still enabling precise contact alignment.
Solution Approach 2:
The patent introduces an intermediary etch stop layer that acts as a mediator between the gate cap layer and the dielectric material. This intermediate layer protects the gate cap layer from direct exposure to the contact etch process, preventing material consumption while allowing the etch to proceed through the dielectric material for accurate contact alignment.
2Reliability
If thicker gate cap layers are formed to compensate for material consumption during contact etching, then gate structure protection is improved, but the aspect ratio of contact openings increases
Solution Approach 1:
The etch stop layer serves as an intermediary that absorbs the etching process, preventing it from reaching and consuming the gate cap layer. This allows the gate cap layer to maintain its original, thinner design without requiring increased thickness for protection, thereby avoiding the increase in contact opening aspect ratio that would result from thicker gate cap layers.
Solution Approach 2:
The etch stop layer acts as a disposable sacrificial layer that is intentionally designed to be consumed during the contact etch process. This short-living protective layer absorbs the harmful etching action, protecting the gate cap layer without requiring permanent structural changes or increased thickness that would complicate the device geometry.
3Manufacturing precision
If continuous monitoring of gate cap layer thickness is implemented during fabrication, then manufacturing precision is improved, but process complexity and cost increase
Solution Approach 1:
The etch stop layer enables a self-service mechanism where the gate cap layer thickness is automatically protected without requiring continuous external monitoring or control interventions. The etch stop layer inherently prevents over-etching and material consumption, providing self-regulating protection that simplifies the fabrication process rather than complicating it with continuous monitoring systems.
Data Source
AI summary
One method includes forming a recessed gate/spacer structure that partially defines a spacer/gate cap recess, forming a gate cap layer in the spacer/gate cap recess, forming a gate cap protection layer on an upper surface of the gate cap layer, and removing portions of the gate cap protection layer, leaving a portion of the gate cap protection layer positioned on the upper surface of the gate cap layer. A device disclosed herein includes a gate/spacer structure positioned in a layer of insulating material, a gate cap layer positioned on the gate/spacer structure, wherein sidewalls of the gate cap layer contact the layer of insulating material, and a gate cap protection layer positioned on an upper surface of the gate cap layer, wherein the sidewalls of the gate cap protection layer also contact the layer of insulating material.