Semiconductor Gate Capping Structure for Contact Alignment

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Solution Overview

Problem

The scaling down of semiconductor devices increases manufacturing complexity, particularly in aligning vias and contact structures on source/drain and gate regions, leading to potential misalignment and undesirable parasitic capacitances or electrical shorts due to the proximity of these structures.

Innovation Solution

The implementation of source/drain and gate capping structures with ultra-high etch selectivity materials, such as nitrides and carbon-based materials, respectively, to minimize misalignment during etching processes, ensuring precise alignment of contact structures through optimized etching processes with selectivity ranging from 40 to 70.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional etching processes are used without ultra-high selectivity materials, then the manufacturing process is simpler, but misalignment occurs between vias and contact structures leading to parasitic capacitances and electrical shorts

Engineering Contradiction:
Improvealignment precision of contact structuresVSAvoidcomplexity of manufacturing process
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by selecting materials with dramatically different etch rates (etch selectivity ratio of 40:1 to 70:1 between carbon-based gate capping structure and nitride-based source/drain capping structure). This allows the etching process to selectively remove the gate capping structure material without significantly affecting the source/drain capping structure, achieving precise alignment (improving_feature) while maintaining a relatively straightforward etching process (managing worsening_feature).

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces intermediary capping structures (carbon-based gate capping structure and nitride-based source/drain capping structure) that serve as protective layers during the etching process. These intermediaries enable selective removal of the gate capping structure while protecting the source/drain regions, thereby achieving precise alignment without requiring complex manufacturing steps.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If scaling down of device dimensions is pursued to increase storage capacity and processing speed, then performance improves, but manufacturing complexity and alignment difficulty increase

Engineering Contradiction:
Improvestorage capacity and processing speedVSAvoidalignment precision of contact structures
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent utilizes parameter changes by exploiting the dramatic difference in etch selectivity (40:1 to 70:1 ratio) between carbon-based and nitride-based materials. This allows for precise selective etching even at scaled-down dimensions, maintaining alignment precision (improving_feature) while enabling higher productivity through continued device scaling (managing worsening_feature).

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces mechanical alignment methods with chemistry-based selective etching. Instead of relying on precise mechanical positioning and alignment, the process uses the chemical difference in etch rates between carbon-based and nitride-based materials to automatically achieve precise alignment, thereby maintaining manufacturing precision even as device dimensions are reduced for higher productivity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Reliability

If conventional capping structures are used without ultra-high etch selectivity, then material selection is easier, but misalignment leads to parasitic capacitances and electrical shorts

Engineering Contradiction:
Improvereliability of contact structuresVSAvoidease of material selection and process optimization
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies parameter changes by selecting materials with extreme differences in etch selectivity (carbon-based materials versus nitride-based materials with 40:1 to 70:1 selectivity ratio). This dramatic parameter difference ensures reliable selective removal of the gate capping structure without affecting the source/drain capping structure, thereby preventing misalignment, parasitic capacitances, and electrical shorts (improving_feature) while requiring specialized material knowledge and process optimization (managing worsening_feature).

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite materials strategy by using different material systems (carbon-based gate capping structure and nitride-based source/drain capping structure) with complementary properties. The carbon-based material provides high etch selectivity for gate region processing, while the nitride-based material provides protection for source/drain regions, together achieving high reliability (improving_feature) through their synergistic interaction despite the complexity of material selection and process optimization (managing worsening_feature).

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of contact structures with minimal or no misalignment, preventing parasitic capacitances and electrical shorts, thereby enhancing the reliability and performance of semiconductor devices.

Implementation Method 1

carbon-based materials have ultra-high etch selectivity against nitride, oxide, or oxynitride materials in an etching process

Methodology Applied
Scientific EffectEtch selectivity:

Data Source

PatentUS20240363721A1Capping structures in semiconductor devices
Publication Date: 2024.10.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240363721A1 patent drawing
  • US20240363721A1 patent drawing
  • US20240363721A1 patent drawing

AI summary

A semiconductor device and methods of fabricating the same are disclosed. The method can include forming a fin structure on a substrate, forming a source/drain (S/D) region on the fin structure, forming a gate structure on the fin structure adjacent to the S/D region, and forming a capping structure on the gate structure. The forming the capping structure includes forming a conductive cap on the gate structure, forming a cap liner on the conductive cap, and forming a carbon-based cap on the cap liner. The method further includes forming a first contact structure on the S/D region, forming an insulating cap on the first contact structure, and forming a second contact structure on the conductive cap.