Gate Capping Pattern for MOSFET Integration Density
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Solution Overview
Problem
The scaling down of MOSFETs in semiconductor devices for increased integration leads to deterioration in operating characteristics, requiring innovative fabrication methods to maintain performance.
Innovation Solution
The semiconductor device design includes an active pattern on a substrate with a gate electrode and gate capping pattern, where the gate capping pattern covers the top surface of the gate electrode and extends perpendicular to the substrate to fill the space between gate electrodes, and a gate spacer covers the sidewalls of the gate electrode, with a method involving forming a sacrificial gate pattern, gate spacer, interlayer insulating layer, and dividing the preliminary gate electrode to create a pair of gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If MOSFETs are scaled down for increased integration, then device density increases, but operating characteristics deteriorate
Solution Approach 1:
The gate electrode is divided into multiple segments (first gate electrode and second gate electrode) separated by a gate capping pattern. This segmentation allows independent optimization of each gate segment, maintaining effective gate control over the active pattern even as overall device dimensions are reduced for higher integration density.
Solution Approach 2:
The gate capping pattern extends in a direction crossing the top surface of the substrate to cover the first sidewall of the gate electrode, adding a vertical/dimensional element to the gate structure. This three-dimensional gate configuration improves gate control without increasing the planar footprint, enabling better operating characteristics at scaled dimensions.
2Reliability
If gate capping pattern extends perpendicular to substrate to fill space between gate electrodes, then electrical shorts are prevented, but manufacturing complexity increases
Solution Approach 1:
The gate capping pattern is formed as part of the gate electrode structure before the active pattern is fully defined and before source/drain regions are formed. This preliminary formation of the gate capping pattern with its perpendicular extension preemptively prevents electrical shorts between adjacent gate electrodes, avoiding the need for additional corrective manufacturing steps later in the process.
Solution Approach 2:
The gate capping pattern serves multiple functions simultaneously: it caps the top surface of the gate electrode, extends perpendicular to cover the first sidewall for structural definition, and fills the space between gate electrodes to prevent electrical shorts. This multi-functionality reduces the need for separate structures, offsetting the manufacturing complexity with process integration.
3Stability of the object's composition
If gate spacer covers second sidewall of gate electrode, then structural integrity is improved, but device area increases
Solution Approach 1:
The gate spacer is applied selectively to cover only the second sidewall of the gate electrode, while the gate capping pattern covers the first sidewall. This localized application of protective structures provides the necessary structural integrity and sidewall coverage without uniformly increasing the device footprint in all directions, optimizing the area efficiency.
Data Source
AI summary
A semiconductor device includes an active pattern, a gate electrode, a gate capping pattern, and a gate spacer. The active pattern extends in a first direction parallel to a top surface of the substrate. The gate electrode extends in a second direction parallel to the top surface of the substrate and intersects the active pattern. The gate capping pattern covers a top surface of the gate electrode and extends in a direction crossing the top surface of the substrate to cover a first sidewall of the gate electrode. The gate spacer covers a second sidewall of the gate electrode. The first sidewall and the second sidewall are opposite to each other in the second direction.