Gate CD Trimming via Oxidation-Stripping Cycles
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Solution Overview
Problem
Conventional photolithography processes are limited to forming semiconductor gate electrodes with horizontal critical dimensions greater than 40 nanometers, leading to deformation and breakage of photoresist and irregular sidewalls, which prevents further scaling of transistor semiconductor devices.
Innovation Solution
Employing a polysilicon oxidation process followed by stripping operations to reduce the critical dimension of gate electrodes, allowing for further scaling by repeatedly growing oxide on the gate sidewalls and then removing it, until a desired dimension is achieved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional photolithography processes are used to pattern gate layers, then manufacturing simplicity is maintained, but manufacturing precision deteriorates at dimensions below 40 nanometers due to photoresist deformation and breakage
Solution Approach 1:
The patent segments the single photolithography patterning step into multiple sequential operations: initial photolithography patterning followed by repeated cycles of oxide growth and oxide stripping. Each cycle further refines the gate critical dimension, allowing achievement of sub-40nm precision by dividing the dimension reduction task across multiple controlled steps rather than relying on a single high-resolution photolithography exposure.
Solution Approach 2:
The patent performs preliminary oxide growth on the gate structure before final patterning is complete. By growing oxide on the gate sidewalls and then selectively stripping it, the process pre-establishes dimensional boundaries that guide subsequent patterning steps, enabling precise critical dimension control that cannot be achieved by photolithography alone.
2Manufacturing precision
If photolithography is used to form gate electrodes, then ease of manufacture is maintained, but manufacturing precision deteriorates due to photoresist shrinkage and irregular sidewalls at small dimensions
Solution Approach 1:
The patent replaces the mechanical/photochemical constraint of photolithography with a chemical/physical process: oxide growth followed by oxide stripping. Instead of relying on photoresist mechanics that fail at small dimensions, the process uses controlled oxidation reactions and chemical stripping to define gate dimensions, substituting a more controllable mechanism for the failing photolithographic approach.
Solution Approach 2:
The patent employs periodic cycles of oxide growth and oxide stripping operations. Each cycle consists of growing oxide on the gate structure, then selectively removing it to refine the critical dimension. This periodic repetition allows incremental precision improvement, with each cycle bringing the gate dimension closer to the target specification while maintaining ease of manufacture through standardized recurring steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the fabrication of semiconductor devices with critical dimensions below conventional photolithography limits, preventing photoresist deformation and achieving more precise and scalable gate electrode dimensions.
Implementation Method 1
A polysilicon oxidation process followed by stripping operations is employed to reduce the critical dimension of gate electrodes
Data Source
AI summary
A semiconductor device is fabricated with a selected critical dimension. A gate dielectric layer is formed over a semiconductor body. A gate layer comprised of a conductive material, such as polysilicon, is formed over the gate dielectric layer. The gate layer is patterned to form a gate electrode having a first horizontal dimension. One or more growth-stripping operations are performed to reduce a critical dimension of the gate electrode to a second horizontal dimension, where the second horizontal dimension is less than the first horizontal dimension.