Gate Driving Circuit Latch Structure for Low-Power Signal Storage

The patent extracts the clock signal dependency from the signal storage function by replacing the capacitor-based storage mechanism with a transistor-based latch mechanism. This allows the gate driving circuit to maintain stored signals without requiring continuous clock signals, thereby eliminating the source of static power consumption while preserving the signal storage function.

The patent transitions from periodic clock signal operation to aperiodic signal storage. By using cross-coupled transistors to create a stable latch state, the circuit stores signals in a non-periodic manner that does not require continuous refreshing, thus reducing power consumption in low-frequency display modes where periodic clock signals would otherwise be required.

The patent implements a self-sustaining signal storage mechanism using cross-coupled transistors that maintain their state through mutual feedback. The transistors serve themselves by providing the necessary holding capability without external intervention, eliminating the need for continuous power supply or clock signals while maintaining signal storage capability.

The patent changes the fundamental operating parameters of the signal storage mechanism by transitioning from capacitor-based storage (which requires continuous charging/discharging cycles) to transistor-based latch storage (which maintains state through stable bias conditions). This parameter change enables signal storage without the continuous energy consumption associated with capacitive storage in dynamic modes.