Gate Driving Circuit Layout for Narrow Display Bezel Panels
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Solution Overview
Problem
The gate bezel area in organic light emitting display devices is enlarged due to the implementation of the gate driving panel circuit, which affects design and manufacturing efficiency.
Innovation Solution
A symmetrical structure for the output buffer block of the gate driving panel circuit is arranged, with gate low-potential voltage connection lines extended through the central area, and multiple gate low-potential voltages with different levels are driven to reduce the gate bezel area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the gate driving panel circuit is implemented in the display panel, then the gate driving function is integrated in panel, but the gate bezel area size increases
Solution Approach 1:
The gate driving circuit is divided into multiple independent modules including output buffer blocks, logic blocks, and compensation blocks. Each module is separately laid out and can be independently optimized, allowing the overall gate bezel area to be reduced while maintaining full gate driving functionality through modular integration.
2Reliability
If multiple gate low-potential voltages with different levels are driven, then ripples are reduced, but circuit complexity increases
Solution Approach 1:
Different gate low-potential voltage levels (GVSS1, GVSS2, GVSS3) are applied to different regions and circuit blocks within the gate driving circuit. The output buffer blocks use different voltage levels tailored to their specific functional requirements, which reduces signal ripples and noise in each local region while maintaining overall circuit reliability.
Solution Approach 2:
Multiple gate low-potential voltage lines are extended through the central area of the gate driving circuit to create equipotential regions. This reduces voltage drops and potential differences across the circuit, minimizing ripples and ensuring stable operation of different circuit blocks.
3Area of stationary object
If gate low-potential voltage connection lines are extended through the central area, then the gate bezel area is reduced, but manufacturing complexity increases
Solution Approach 1:
The gate low-potential voltage connection lines extending through the central area serve multiple functions: they provide voltage supply to multiple different voltage levels (GVSS1, GVSS2, GVSS3) to different circuit blocks, act as reference potential lines for noise reduction, and enable compact layout optimization. This multi-functionality reduces the gate bezel area while the standardized connection pattern maintains manufacturing efficiency.
Data Source
AI summary
Embodiments of the disclosure relate to a display panel and a display device and, specifically, may provide a display panel comprising a display area where a plurality of subpixels are disposed, a gate driving circuit disposed in a non-display area outside the display area to supply a plurality of scan signals to the plurality of subpixels, a plurality of gate high-potential voltage lines which are disposed in a side of the gate driving circuit for transferring a plurality of gate high-potential voltages, a plurality of gate low-potential voltage lines which are disposed in other side of the gate driving circuit for transferring a plurality of gate low-potential voltages, and a plurality of gate low-potential voltage connection lines which are extended through a central area of the gate driving circuit for transferring the plurality of gate low-potential voltages to the gate driving circuit.