Gate Clock Signal Generator for Display Device Luminance
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Solution Overview
Problem
Display devices face challenges in improving luminance characteristics, particularly in low grayscale areas, where existing technologies struggle to maintain consistent charge times across different grayscale levels, leading to uneven pixel charging and reduced image quality.
Innovation Solution
A display device is designed with a gate driver, average grayscale calculator, area determiner, and gate clock signal generator that differentiate between low and normal grayscale areas by adjusting gate clock signals, ensuring equal or similar charge times for pixels across these areas through interpolation of gate clock signals in interpolation areas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single gate clock signal is used for all areas, then the device complexity is reduced, but the luminance characteristics in low grayscale areas deteriorate due to inconsistent charge times
Solution Approach 1:
The display panel is divided into multiple areas (first area and second area) with different grayscale characteristics. Each area receives a differentiated gate clock signal (first gate clock signal or second gate clock signal) tailored to its specific grayscale requirements, enabling precise control of charge times in each region while maintaining overall system functionality.
Solution Approach 2:
Different gate clock signal parameters (such as clock cycle duration or frequency) are applied to different spatial regions of the display panel based on their local grayscale characteristics. The first area with lower grayscale values receives a first gate clock signal optimized for its charging needs, while the second area with higher grayscale values receives a second gate clock signal, thereby achieving local optimization of luminance characteristics without unnecessarily complicating the entire system.
2Manufacturing precision
If gate clock signals are differentiated by area, then the luminance characteristics are improved, but the device complexity increases due to multiple signal generators and control logic
Solution Approach 1:
The grayscale characteristics of different areas are determined in advance during the display device initialization or configuration phase. Based on these pre-determined characteristics, the appropriate gate clock signal (first or second) is selected and assigned to each area before actual display operation begins. This preliminary classification reduces the complexity of real-time control logic while maintaining precise luminance control.
Solution Approach 2:
Instead of using completely separate gate clock signal generators for each area, the system varies specific parameters (such as clock frequency or duty cycle) of a unified gate clock signal source to generate area-specific signals. This parameter-based differentiation achieves the required signal diversity while minimizing the increase in device complexity compared to using entirely separate signal generation circuits.
3Manufacturing precision
If the charge time is increased for low grayscale areas, then the luminance characteristics are improved, but the productivity decreases due to longer pixel charging time
Solution Approach 1:
The gate clock signal parameters are dynamically adjusted according to the grayscale characteristics of different display areas. For low grayscale areas where longer charge times are needed for optimal luminance, the first gate clock signal is configured with parameters that extend the effective charging duration. For high grayscale areas where faster charging is acceptable or needed, the second gate clock signal uses parameters that enable quicker charging. This dynamic adaptation optimizes both luminance characteristics and overall display refresh efficiency.
Data Source
AI summary
A display device includes a display panel including areas including pixels electrically connected to a plurality of gate lines and a plurality of data lines; a gate driver that supplies a gate signal to each of the plurality of gate lines; an average grayscale calculator that receives input image data, and calculating average grayscale values with respect to the areas; an area determiner that compares the average grayscale values with a low grayscale reference value to determine a low grayscale area among the areas, and output a charge boosting signal; a memory that stores gate clock signal information according to a grayscale; and a gate clock signal generator that supplies a gate clock signal corresponding to the areas to the gate driver by reflecting the charge boosting signal and the gate clock signal information according to the grayscale.