Gate Structure Cluster Layer for Metal Diffusion Blocking
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Solution Overview
Problem
As semiconductor devices undergo miniaturization, challenges arise in preventing Al and Ti atoms from diffusing into the gate dielectric layer, leading to threshold voltage shifts, leakage, and gate dielectric burning, which affect the control and reliability of transistor performance.
Innovation Solution
A cluster layer comprising a work function metal layer, a barrier layer, a cap layer, and a glue layer is formed between the gate dielectric and metal layers, with the cap layer made of amorphous silicon, carbon, or germanium to prevent diffusion and enhance control over the gate structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Al and Ti metal layers are used in the gate structure, then the work function and transistor performance are improved, but Al and Ti atoms diffuse into the gate dielectric layer causing threshold voltage shifts and leakage
Solution Approach 1:
A cluster layer comprising multiple sub-layers (barrier layer, cap layer, glue layer) is introduced as an intermediary between the Al/Ti metal layer and the gate dielectric layer. This cluster layer acts as a mediator that prevents Al and Ti atoms from diffusing into the gate dielectric while maintaining the electrical functionality of the gate structure.
Solution Approach 2:
The cluster layer is formed as a composite structure with multiple materials including titanium nitride (TiN), tantalum nitride (TaN), amorphous silicon, amorphous carbon, and amorphous germanium. This composite material approach provides both diffusion barrier properties and appropriate electrical characteristics for gate control.
2Productivity
If continuous deposition is performed without breaking vacuum, then process efficiency and productivity are improved, but oxidation of deposited layers may occur
Solution Approach 1:
The entire cluster layer deposition process is performed in-situ within the atomic layer deposition (ALD) reactor without breaking vacuum, maintaining an inert atmosphere throughout. This prevents oxidation of the deposited materials while achieving continuous processing and high productivity.
3Reliability
If multiple layers are deposited to form the cluster layer, then diffusion prevention capability is improved, but device structure complexity increases
Solution Approach 1:
The cluster layer is segmented into multiple functional sub-layers: a barrier layer (TiN or TaN) for primary diffusion prevention, a cap layer (amorphous silicon, carbon, or germanium) for additional protection and interface quality, and a glue layer for adhesion. This segmentation allows each layer to perform its specific function optimally.
Solution Approach 2:
The cluster layer structure serves multiple functions simultaneously: it acts as a diffusion barrier, provides electrical contact, ensures adhesion between layers, and prevents oxidation. This multi-functionality reduces the need for separate components and simplifies the overall device architecture despite the multiple sub-layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents Al and Ti atom diffusion, improving threshold voltage stability, reducing leakage, and preventing gate dielectric burning, thereby enhancing the control and reliability of the transistor.
Implementation Method 1
A cluster material is then deposited over the high-k material using an atomic layer deposition (ALD) process
Implementation Method 2
A cluster layer comprising a work function metal layer, a barrier layer, a cap layer, and a glue layer is formed between the gate dielectric and metal layers, with the cap layer made of amorphous silicon, carbon, or germanium to prevent diffusion
Data Source
AI summary
Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.


