Gate Contact Structures Using Dual Dielectric Spacers
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Solution Overview
Problem
As semiconductor processes scale down, it becomes challenging to fabricate back end of the line (BEOL) and middle of the line (MOL) metallization features due to critical dimension scaling and process limitations, leading to issues like shorting between metal materials in gate and contact structures during etching processes.
Innovation Solution
The solution involves forming a gate structure on a semiconductor substrate with a recessed contact material, using a high-k dielectric inner spacer material to prevent erosion and shorting, and filling the recess cavity with a dielectric material, followed by planarization and selective etching to create contact openings that avoid shorting between source/drain contacts and gate metallization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dielectric material is removed above and adjacent to gate structures using etching process, then contact openings are formed, but sidewall material is eroded away exposing metal material resulting in short between gate metal and contact metal
Solution Approach 1:
The patent divides the sidewall protection function into two separate material layers: a first sidewall material and a second sidewall material. This segmentation allows each layer to be optimized for different etching conditions, with the first sidewall material providing initial protection and the second sidewall material providing enhanced protection during subsequent etching processes, thereby preventing erosion that would expose the metal and cause shorts.
Solution Approach 2:
The patent employs composite sidewall structures using different dielectric materials with varying etch resistance properties. The first sidewall material and second sidewall material are selected to have different etch selectivities, creating a composite structure that provides graded protection during the etching process. This composite approach allows the sidewalls to withstand the aggressive etching conditions needed to form contact openings while maintaining integrity to prevent metal exposure and shorts.
2Reliability
If spacer material is used to protect gate structure during etching, then sidewall protection is provided, but the low-k dielectric material is eroded away in downstream etching processes
Solution Approach 1:
The patent applies preliminary protective action by forming the first sidewall material on the gate structure before any etching processes begin. This initial protective layer is specifically designed to withstand subsequent etching steps. Additionally, the second sidewall material is formed after contact opening formation to provide further protection during metal deposition, ensuring the gate structure remains protected throughout the entire fabrication sequence without material erosion.
Solution Approach 2:
The patent changes the material parameters of the sidewall protection by transitioning from a single low-k dielectric material to a two-material system with different etch selectivities. The first sidewall material has higher etch resistance for initial protection, while the second sidewall material provides complementary protection. This parameter change in material composition and etch resistance allows the sidewalls to maintain integrity during aggressive etching processes while still providing the necessary protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents shorting between source/drain contacts and gate metallization, enabling robust integration of contact structures over active gates, particularly in smaller technology nodes, by using a high-k dielectric spacer material that maintains etch selectivity and protects the gate structure during downstream processes.
Implementation Method 1
using a high-k dielectric inner spacer material to prevent erosion and shorting
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to a contact over an active gate structure and methods of manufacture. The structure includes: an active gate structure composed of conductive material located between sidewall material; an upper sidewall material above the sidewall material, the upper sidewall material being different material than the sidewall material; and a contact structure in electrical contact with the conductive material of the active gate structure. The contact structure is located between the sidewall material and between the upper sidewall material.