Gate Contact Structure for High Density IC Design

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Solution Overview

Problem

In semiconductor devices, particularly MOSFETs, the challenge lies in achieving high packing density and performance while adhering to restricted design rules at advanced technology nodes, where precise critical dimension control is necessary to avoid increased chip area and fabrication costs, often requiring additional metal layers that complicate the layout and increase costs.

Innovation Solution

The introduction of a semiconductor structure with a gate contact having a geometry that extends horizontally in one direction and vertically in another, allowing for increased contact area without the need for an extra metal layer, thereby maintaining design rule compliance and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If poly-gate jog structure is used to comply with design rules, then design rule compliance is achieved, but critical dimension control precision is worsened and chip area increases

Engineering Contradiction:
Improvedesign rule complianceVSAvoidcritical dimension control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The gate contact structure transitions from a planar contact to a multi-dimensional structure that extends vertically into the isolation region and horizontally along the gate. This dimensional expansion allows the contact to reach the gate electrode without requiring precise lateral positioning, thereby complying with design rules while maintaining manufacturing precision.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The isolation region serves as an intermediary space that accommodates the gate contact structure. By allowing the contact to extend into the isolation region, the design provides a buffer zone that facilitates design rule compliance without imposing stringent critical dimension control requirements on the active device areas.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If poly-gate jog structure is implemented, then design rule compliance is achieved, but chip area increases

Engineering Contradiction:
Improvedesign rule complianceVSAvoidchip area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The gate contact utilizes the vertical dimension by extending into the isolation region, which allows it to reach the gate electrode without requiring additional lateral space. This vertical exploitation of the isolation region enables design rule compliance while maintaining compact chip footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The isolation region serves dual functions: it provides electrical isolation between devices and simultaneously accommodates the gate contact structure. This multi-functionality eliminates the need for separate contact structures, thereby reducing overall chip area while ensuring design rule compliance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If extra metal layer is added to avoid poly gate jog, then design rule compliance is achieved, but device complexity and fabrication cost increase

Engineering Contradiction:
Improvedesign rule complianceVSAvoidmetal layer structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The existing isolation region is repurposed to accommodate the gate contact structure, allowing a single metal layer to serve both as the gate contact and as part of the interconnect structure. This eliminates the need for an additional dedicated metal layer, thereby reducing device complexity and fabrication cost while maintaining design rule compliance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The gate contact structure is merged with the isolation region, combining two previously separate functional elements into a unified structure. This integration allows the contact to reach the gate without requiring an extra metal layer, simplifying the overall device architecture and reducing fabrication complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8217469B2Contact implement structure for high density design
Publication Date: 2012.07.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8217469B2 patent drawing
  • US8217469B2 patent drawing
  • US8217469B2 patent drawing

AI summary

The present disclosure provides a device in an integrated circuit. The device includes an active region in a semiconductor substrate; an isolation region adjacent the active region; a gate disposed on the active region and extending to the isolation region in a first direction; and a gate contact disposed within the isolation region, having a portion directly overlying and contacting the gate, and having a geometry horizontally extending to a first dimension in the first direction and a second dimension in a second direction approximately perpendicular to the first direction. The first dimension is greater than the second dimension.