Gate Contact Plug Layout to Prevent Selection Line Penetration
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Solution Overview
Problem
Three-dimensional nonvolatile memory devices face issues with the string selection line being penetrated during the formation of the memory gate contact and/or the selection line stud, leading to potential structural integrity and electrical connectivity challenges.
Innovation Solution
The semiconductor device incorporates a selection line stud made of the same material as the string selection line, with distinct materials used for the lower gate electrode and memory gate contact, and includes a vertically extending structure to prevent penetration during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the string selection line is penetrated during the formation of the memory gate contact and/or selection line stud, then the manufacturing process can be simplified, but the structural integrity and electrical connectivity are compromised
Solution Approach 1:
The string selection line is divided into multiple segments: the original string selection line and the selection line stud. The selection line stud extends downward from the string selection line to connect with the lower gate electrode, creating a segmented structure that prevents penetration damage while maintaining electrical connectivity. This segmentation allows the line to bypass obstacles without being compromised.
Solution Approach 2:
The selection line stud acts as an intermediary element between the string selection line and the lower gate electrode. Instead of directly penetrating the string selection line to reach the lower gate electrode, the selection line stud serves as a mediating conductor that establishes the electrical connection without compromising the integrity of the string selection line.
2Reliability
If the selection line stud is formed to prevent penetration, then the structural integrity is improved, but the device complexity increases
Solution Approach 1:
The selection line stud is formed by merging the string selection line material with the lower gate electrode connection structure. This combined structure serves dual purposes: maintaining the string selection line integrity and providing a connection path to the lower gate electrode, thereby reducing overall device complexity despite the added protective feature.
Solution Approach 2:
The selection line stud performs multiple functions simultaneously: it maintains the integrity of the string selection line, provides an electrical connection path to the lower gate electrode, and prevents penetration damage. This multi-functionality reduces the need for separate protective structures, thereby managing device complexity.
3Manufacturing precision
If distinct materials are used for the string selection line and lower gate electrode, then the manufacturing precision is improved through better material differentiation, but the loss of substance increases due to additional material layers
Solution Approach 1:
Different materials are used at different locations within the device structure. The string selection line uses one material optimized for its specific function, while the lower gate electrode uses a different material optimized for its function. This local quality approach allows precise material differentiation where needed without unnecessarily adding material throughout the entire device.
Solution Approach 2:
The material parameters (composition, properties) are changed locally based on functional requirements. By adjusting material parameters only where specific functions are needed (string selection line vs. lower gate electrode), the patent achieves manufacturing precision without excessive material usage throughout the entire device structure.
Data Source
AI summary
A semiconductor device includes lower gate electrodes and upper gate electrodes; upper gate contact plugs; and lower gate contact plugs. The lower channel structure includes a lower channel layer. The upper channel structure includes an upper channel layer connected to the lower channel layer. The lower gate contact plugs include: a first intermediate gate contact plug contacting a first intermediate gate electrode; and a second intermediate gate contact plug contacting a second intermediate gate electrode. The upper gate contact plugs include: a first upper gate contact plug contacting a first upper gate electrode; and a second upper gate contact plug contacting a second upper gate electrode. A maximum width of the first intermediate gate contact plug is greater than a maximum width of the first upper gate contact plug