Gate Contact Trench Structure for Uniform NAND Memory Spacing
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Solution Overview
Problem
Existing semiconductor memory device manufacturing methods face challenges in forming uniform and efficient gate structures that ensure consistent electrical performance and reliable data storage, particularly in NAND flash memory cells, due to non-uniform distances between the gate structure and gate contacts.
Innovation Solution
A method involving the formation of vertical gate oxide spacers and gate contacts with a T-shaped profile, using chemical mechanical polishing and atomic layer deposition to create uniform distances and ensure consistent contact with the gate source/drain regions, incorporating polysilicon and tungsten layers for the gate conductive portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional gate contact formation methods are used, then the manufacturing process is simpler, but the distance between gate structure and gate contact is non-uniform
Solution Approach 1:
The gate contact formation process is segmented into multiple distinct steps: forming first gate nitride spacers, depositing gate oxide material, forming first gate cap nitride layer, etching gate contact trenches, forming second gate nitride spacers, depositing gate contact oxide material, and forming gate contact metal material. Each step serves a specific function to achieve uniform spacing and proper contact structure.
Solution Approach 2:
Gate nitride spacers are formed preliminarily before gate contact formation to establish the precise spacing and positioning. The first gate nitride spacers are formed around the gate structure, and second gate nitride spacers are formed in the gate contact trenches, creating a predetermined uniform distance between the gate structure and the final gate contact.
2Reliability
If gate contact trenches are etched directly without spacers, then the process is faster, but the contact uniformity and electrical performance are poor
Solution Approach 1:
Gate nitride spacers serve as intermediary structures that mediate between the gate structure and the gate contact. These spacers establish the precise geometric relationship and uniform spacing, ensuring consistent electrical performance. The spacers are formed through atomic layer deposition which provides conformal coverage and precise thickness control.
Solution Approach 2:
The manufacturing process utilizes atomic layer deposition to precisely control the thickness and uniformity of the gate nitride spacers. By controlling deposition parameters such as precursor flow rates, temperature, and pressure, the spacer thickness is maintained within tight tolerances to ensure uniform gate contact spacing and reliable electrical performance.
3Area of stationary object
If a single-layer gate contact structure is used, then the manufacturing is simpler, but the contact area with source/drain region is insufficient
Solution Approach 1:
The gate contact structure employs an asymmetric T-shaped profile where the gate contact metal material extends wider at the bottom than at the top. This asymmetric design maximizes the contact area with the source/drain region at the bottom while maintaining a smaller footprint at the top, improving electrical connection without excessive complexity.
Solution Approach 2:
The gate contact structure utilizes vertical dimensionality by forming gate contact trenches that extend downward to expose the gate source/drain region. The second gate nitride spacers are formed within these trenches, and the gate contact metal material is deposited to create a T-shaped profile that extends in both horizontal and vertical dimensions, maximizing contact area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method achieves uniform and reliable gate contact formation, maintaining consistent electrical characteristics and enhancing data storage capabilities by ensuring a uniform distance between the gate structure and gate contact, with a wider bottom for improved contact with the source/drain region.
Implementation Method 1
forming second gate nitride spacers in the gate contact trenches; the second gate nitride spacers are formed by an atomic layer deposition process
Implementation Method 2
performing a chemical mechanical polishing process to remove excess gate oxide material; performing a chemical mechanical polishing process to remove excess gate contact oxide material
Data Source
AI summary
A semiconductor memory device manufacturing method includes the following steps. A gate structure is formed on a substrate. First gate nitride spacers are formed around the gate structure. A gate oxide material is formed between adjacent first gate nitride spacers. A first gate cap nitride layer is formed. The first gate cap nitride layer is patterned and used as a hard mask to etch gate contact trenches. Second gate nitride spacers are formed in the gate contact trenches. A gate contact oxide material is formed in the gate contact trenches. A second gate cap nitride layer is formed. The second gate cap nitride layer is patterned to form an opening to expose the gate contact oxide material. The gate contact oxide material is removed from the gate contact trenches. A gate contact metal material is formed into the gate contact trenches.