Gate-Controlled Bipolar Junction Transistor FinFET Integration
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Solution Overview
Problem
Conventional PNP bipolar junction transistors (BJTs) suffer from low beta (current gain) and integration challenges with FinFETs, requiring improved semiconductor structures and transistors with enhanced performance and reduced device area.
Innovation Solution
A gate-controlled bipolar junction transistor design featuring a substrate with emitter, base, and collector regions, including first and second metal gates with extended contact end portions and contact plugs, allowing for biasing to specific voltages to enhance current gain, integrated into a FinFET structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional PNP bipolar junction transistors are used, then the device can be manufactured with traditional processes, but the beta value (current gain) is low
Solution Approach 1:
The patent merges the bipolar junction transistor structure with FinFET technology, combining the emitter, base, and collector regions with vertical fin structures. This integration allows the BJT to benefit from the high surface area-to-volume ratio of FinFETs, significantly improving beta value while using compatible manufacturing processes
Solution Approach 2:
The patent transitions from a planar BJT structure to a three-dimensional FinFET-based structure with vertical fins extending from the substrate. This dimensional change increases the effective emitter-base junction area without proportionally increasing the device footprint, thereby enhancing current gain
2Productivity
If FinFET structure is integrated, then the drive current is enhanced and short channel effect is reduced, but the device complexity increases
Solution Approach 1:
The patent designs the FinFET structure to serve multiple functions: it acts as both the transistor channel for high drive current and as the emitter/base/collector regions for bipolar operation. The same vertical fin structures provide both the high surface area for current conduction and the geometric configuration for bipolar junction functionality
Solution Approach 2:
The patent segments the FinFET structure into distinct emitter, base, and collector regions along the vertical fin structures, with metal gates positioned at different heights to create the bipolar junction. This segmentation allows independent optimization of each region while maintaining the integrated FinFET architecture
3Area of stationary object
If conventional BJT structure is used, then the manufacturing process is simpler, but the device area is larger
Solution Approach 1:
The patent exploits the vertical dimension by extending fin structures upward from the substrate, allowing the bipolar junction areas to stack vertically rather than spreading horizontally. This three-dimensional configuration dramatically reduces the device footprint while maintaining sufficient junction areas for adequate current gain
Solution Approach 2:
The patent nests the bipolar junction structures within the FinFET architecture, where the emitter, base, and collector regions are contained within the vertical fin structures. The metal gates are nested at different positions along the fin height, creating a compact integrated structure that maximizes functionality within minimal area
Data Source
AI summary
A gate-controlled bipolar junction transistor includes a substrate, an emitter region, a base region disposed on one side of the emitter region, and a collector region disposed on one side of the base region and being opposite to the emitter region. The emitter region includes first fin structures, first metal gates extending across the first fin structures, and an emitter contact plug on the first fin structures. A gate contact region is disposed between the emitter region and the base region. Each of the first metal gates includes an extended contact end portion protruding toward the base region. The extended contact end portion is disposed within the gate contact region. A gate contact is disposed on the extended contact end portion.


