Gate Controller Circuit for ATE Current Limit Testing
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Solution Overview
Problem
Current limiting circuits in power converters face challenges in testing due to the limited current capabilities of automated test equipment (ATE), which makes it difficult to simulate the high current conditions that power transistors encounter during normal operation, leading to inefficiencies in testing and potential damage.
Innovation Solution
A gate controller is designed to manage the operation of high-side and low-side power transistors, allowing for normal operation, one hundred percent mode, and current limit test mode by controlling the connection between their gate terminals and utilizing a charge pump to assist in current limit testing, thereby enabling effective current limit testing with ATE systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If automated test equipment is used to test current limiting circuits, then testing can be automated and standardized, but the limited current capabilities of ATE make it difficult to simulate high current conditions that power transistors encounter during normal operation
Solution Approach 1:
The power transistor is divided into two separate transistors: a first power transistor that handles normal operation and a second power transistor that is activated during test mode. This segmentation allows the testing system to use lower current capabilities while still accurately testing current limiting functionality, as the second transistor is specifically designed for test conditions with ATE systems.
Solution Approach 2:
The system dynamically switches between different transistor configurations based on operational mode. During normal operation, the first power transistor is active with its gate terminal connected to the control circuit. During test mode, the second power transistor is activated instead, allowing the system to adapt its current handling characteristics to match the capabilities of the testing equipment.
2Productivity
If the gate terminal of the power transistor is directly controlled by the control circuit, then the power transistor can be efficiently controlled during normal operation, but testing of current limit functionality becomes difficult due to the high current requirements
Solution Approach 1:
A second power transistor is introduced as an intermediary element specifically for testing purposes. This second transistor acts as a mediator between the ATE system and the current limiting circuit, allowing test signals to be applied without requiring the full current capabilities that would be needed if directly testing the main power transistor.
Solution Approach 2:
The second power transistor is pre-configured and positioned in the circuit specifically to handle testing scenarios. Its gate terminal is connected to receive control signals, and it is designed with appropriate current ratings for ATE testing, allowing current limit functionality to be tested before the main power transistor is deployed in high-current applications.
3Reliability
If a second power transistor is added for test mode operation, then current limit testing becomes feasible with ATE systems, but the silicon area and cost of the power converter increase
Solution Approach 1:
The control circuit is designed to serve multiple functions: it controls the first power transistor during normal operation and controls the second power transistor during test mode. This multi-functionality allows a single control circuit to manage both operational modes without requiring separate dedicated control circuits, thereby reducing the overall silicon area impact of adding the second transistor.
Solution Approach 2:
The system changes its operational parameters by switching between different transistor configurations. The second power transistor is designed with specific parameters optimized for testing (lower current rating, appropriate voltage characteristics), allowing it to be smaller in size compared to a full-power transistor, thus minimizing the silicon area increase while still enabling effective current limit testing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution allows for efficient testing of current limiting circuits within the constraints of ATE systems, reducing the risk of transistor damage and improving the accuracy of current limit testing, while also minimizing the silicon area and cost of the power converter and gate driver.
Implementation Method 1
the gate controller includes a charge pump configured to generate a test gate voltage
Data Source
AI summary
Methods, apparatus, systems and articles of manufacture are disclosed. An example apparatus includes a gate controller coupled between an input terminal and an intermediate node, the gate controller including a first transistor coupled between the input terminal and a first node; a second transistor coupled between the first node and the intermediate node; a third transistor coupled between the input terminal and the intermediate node; and a charge pump coupled to the intermediate node; a switching network coupled between the intermediate node and an output terminal, the switching network including a high-side drive (HSD) transistor having a HSD gate terminal coupled to the intermediate node, the HSD transistor coupled between an input voltage and a switch node.