Gate Cut Alignment via Selective Etching of Insulating Layers

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Solution Overview

Problem

In modern integrated circuits, the precise alignment of gate cut masks during the cutting of gate structures is challenging due to decreasing gate pitch dimensions, leading to misalignment issues that can result in damage to adjacent gate structures and reduced production yields.

Innovation Solution

A method involving the formation of laterally spaced apart continuous line-type gates with selectively etchable insulating materials, allowing for selective removal of gate structures and the creation of gate-cut cavities, which includes forming a protective insulating layer between gates to accommodate misalignment and prevent damage during etching processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional gate cut mask alignment methods are used, then manufacturing complexity is reduced, but manufacturing precision deteriorates due to misalignment issues

Engineering Contradiction:
Improvegate cut alignment precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The method performs preliminary actions by forming protective insulating material layers and sacrificial gate structures before the actual gate cut operation. These preliminary structures are designed to guide the etching process and protect adjacent gates, ensuring precise cutting without requiring extremely tight alignment tolerances during the mask formation step.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediary elements including protective insulating material layers and sacrificial gate structures that act as mediators between the gate cut mask and the actual gate structures. These intermediaries absorb misalignment errors and guide the etching process to achieve precise gate cuts even when mask alignment is not perfect.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If gate pitch dimensions are decreased to increase circuit density, then productivity is improved, but manufacturing precision deteriorates due to smaller process windows

Engineering Contradiction:
Improvecircuit densityVSAvoidgate cut alignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent segments the gate structures into sacrificial gate portions and protected gate portions using protective insulating material layers. This segmentation allows the etching process to selectively remove only the intended gate portions while protecting adjacent gates, enabling precise gate cuts even at reduced pitch dimensions where alignment margins are minimal.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The method performs preliminary protective actions by depositing protective insulating material layers and forming sacrificial structures before the gate cut etching step. These preliminary structures create a controlled environment that guides the etching process, allowing precise gate cuts at smaller pitch dimensions without requiring extremely tight alignment tolerances.

Inventive Principle:
Principle #10Preliminary action

3Ease of operation

If misalignment tolerance is increased to simplify alignment, then ease of operation is improved, but manufacturing precision deteriorates due to potential damage to adjacent gates

Engineering Contradiction:
Improvealignment easeVSAvoidgate cut accuracy
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent implements beforehand cushioning by forming protective insulating material layers and sacrificial gate structures that act as buffer zones between the gate cut mask opening and the adjacent gate structures. These cushioning structures absorb misalignment errors and prevent etching damage to adjacent gates, allowing larger alignment tolerances without sacrificing cutting accuracy.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The protective insulating material layers and sacrificial structures serve as intermediary elements that mediate between the gate cut mask and adjacent gates. These intermediaries allow larger misalignment tolerances by guiding the etching process and protecting adjacent structures, thus maintaining cutting accuracy even with easier, less precise alignment procedures.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If additional protective structures are added to prevent gate damage, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvegate structure integrityVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the gate structures into sacrificial portions and protected portions, allowing selective removal of only the intended gate sections. This segmentation approach ensures gate structure integrity by preventing etching damage to adjacent gates while maintaining a relatively streamlined process compared to more comprehensive protective measures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The method employs sacrificial gate structures that are temporarily formed to guide the gate cut process and are subsequently removed. These sacrificial structures provide necessary protection and guidance during manufacturing but are discarded after serving their purpose, avoiding permanent complexity in the final device structure while ensuring gate integrity during processing.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method enhances the process window for accurate gate cutting, reduces the risk of damaging adjacent gate structures, and simplifies the manufacturing process by allowing for larger misalignment tolerances and reduced additional processing steps.

Implementation Method 1

performing at least one first etching process to selectively remove a portion of the first layer relative to portions of the second layer so as to thereby expose a portion of an axial length of the gate structure

Methodology Applied
Scientific EffectSelective etching:

Implementation Method 2

performing at least one second etching process to selectively remove the exposed axial portion of the gate structure so as to thereby define a gate-cut cavity

Methodology Applied
Scientific EffectSelective etching:

Data Source

PatentUS9812365B1Methods of cutting gate structures on transistor devices
Publication Date: 2017.11.07 GLOBALFOUNDRIES US INC
  • US9812365B1 patent drawing
  • US9812365B1 patent drawing
  • US9812365B1 patent drawing

AI summary

One illustrative method disclosed includes, among other things, forming a plurality of gates above a substrate, each of the gates comprising a gate structure and a first layer of a first insulating material positioned on an upper surface of the gate structure, and forming a second layer of a second insulating material above insulating material positioned above the substrate between the laterally spaced apart gates, wherein the first insulating material and the second insulating material are selectively etchable relative to one another. The method may also include selectively removing a portion of the first layer to thereby expose a portion of the gate structure of at least one of the gates, selectively removing the exposed portion of the gate structure so as to thereby define a gate-cut cavity, and forming an insulating gate-cut structure in the gate-cut cavity.