Gate Cut Etch Stop Layer for Power Rail Short Prevention
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Solution Overview
Problem
In semiconductor device manufacturing, particularly in the dummy gate cut last process flow, the etch process for forming gate structures can lead to shorting between power rails and gate structures due to lateral etching, and over-etching into the substrate, resulting in device failure and critical dimension blow-up.
Innovation Solution
The implementation of a conformal etch stop layer within the gate cut trench, composed of materials like hafnium oxide, to obstruct lateral etching and prevent over-etching, ensuring precise control during the formation of power rails and maintaining the integrity of gate structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lateral etching is not obstructed during power rail formation, then the etching process can proceed freely, but power rail to gate structure shorting occurs
Solution Approach 1:
An etch stop layer is introduced as an intermediary component within the gate cut trench. This layer selectively obstructs lateral etching during power rail formation, preventing direct contact between the power rail and gate structure. The etch stop layer acts as a mediator that allows vertical etching progression while blocking lateral etch propagation, thereby eliminating shorting without requiring complex process modifications.
2Reliability
If over-etching is not prevented, then the etching process can complete thoroughly, but substrate damage occurs
Solution Approach 1:
The etch stop layer is deposited in advance within the gate cut trench before power rail formation. This preliminary action creates a protective barrier that prevents over-etching into the substrate during subsequent etching processes. The layer is positioned strategically to stop etching at the desired depth, ensuring precise critical dimension control while protecting the substrate from damage.
3Manufacturing precision
If no etch stop mechanism is used, then the manufacturing process is simpler, but critical dimension blow-up occurs
Solution Approach 1:
The etch stop layer is applied locally within the gate cut trench region rather than uniformly across the entire wafer. This localized application provides precise critical dimension control exactly where needed (at the gate cut interface) without adding unnecessary complexity to other areas of the device structure. The layer's selective placement optimizes its effectiveness while minimizing overall process complexity.
Data Source
AI summary
A method of forming a power rail to semiconductor devices comprising removing a portion of the gate structure forming a gate cut trench separating a first active region of fin structures from a second active region of fin structures. A conformal etch stop layer is formed in the gate cut trench. A fill material is formed on the conformal etch stop layer filling at least a portion of the gate cut trench. The fill material has a composition that is etched selectively to the conformal etch stop layer. A power rail is formed in the gate cut trench. The conformal etch stop layer obstructs lateral etching during forming the power rail to substantially eliminate power rail to gate structure shorting.