Gate Cut Etch Stop Layer for Short-Free Power Rail Formation
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Solution Overview
Problem
In semiconductor device manufacturing, particularly in the dummy gate cut last process flow, the etch process for forming electrical contacts and power rails can lead to shorting between the power rail and gate structures due to lateral etching, and over-etching can result in substrate leakage.
Innovation Solution
The implementation of an integrated etch stop layer within the gate cut trench, composed of materials like hafnium oxide, which obstructs lateral etching during the formation of the source power rail interconnect, thereby preventing shorting to the gate structures and substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If lateral etching is used to form power rail interconnect, then the power rail can be formed in the gate cut trench, but the etching may cause shorting between the power rail and gate structures
Solution Approach 1:
An etch stop layer is introduced as an intermediary material between the gate structure and the power rail interconnect. This layer selectively prevents lateral etching from reaching the gate structure while allowing the power rail etching process to proceed, thus mediating between the need for power rail formation and the need to prevent shorting.
Solution Approach 2:
The etch stop layer is deposited in advance before the power rail interconnect formation. This preliminary action prepares the structure by creating a protective barrier that will prevent harmful lateral etching during the subsequent power rail etching process, without interfering with the intended etching path to the gate contact.
2Manufacturing precision
If over-etching is used to ensure complete gate cut separation, then the gate structures are fully separated, but the substrate may be etched causing leakage
Solution Approach 1:
The etch stop layer is deposited beforehand on the gate structure surface. This preliminary protective coating ensures that when aggressive etching is applied to achieve complete gate cut separation, the substrate is protected from over-etching damage, preventing substrate leakage while still allowing thorough gate separation.
Solution Approach 2:
The etch stop layer serves as a cushioning protective layer that absorbs the excess etching energy. By placing this layer beforehand, the system is cushioned against the harmful effects of over-etching, allowing the etching process to proceed aggressively enough to ensure complete gate separation without risking substrate damage.
Data Source
AI summary
A method of forming a power rail to semiconductor devices comprising removing a portion of the gate structure forming a gate cut trench separating a first active region of fin structures from a second active region of fin structures. A conformal etch stop layer is formed in the gate cut trench. A fill material is formed on the conformal etch stop layer filling at least a portion of the gate cut trench. The fill material has a composition that is etched selectively to the conformal etch stop layer. A power rail is formed in the gate cut trench. The conformal etch stop layer obstructs lateral etching during forming the power rail to substantially eliminate power rail to gate structure shorting.