Gate Cut Structure With Segmented Gates for FET Channel Control

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Solution Overview

Problem

Current semiconductor technologies face challenges in further miniaturizing structural features while maintaining effective control over the channel in FETs, particularly as they approach atomic level scaling.

Innovation Solution

The proposed solution involves forming a gate cut structure in semiconductor devices, where a source/drain contact structure with a first metal layer and a second metal layer, having a different material composition, is disposed around the gate cut portion. This configuration allows for the formation of gate cut portions through the gate structure, enabling efficient contact formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If FET size is reduced for miniaturization, then chip density and performance increase, but control over the channel becomes difficult to maintain

Engineering Contradiction:
ImproveFET sizeVSAvoidchannel control
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The gate structure is segmented into multiple gates (first gate and second gate) that can be independently controlled. This segmentation allows each gate to effectively control its respective channel region, maintaining control effectiveness even as the overall device is miniaturized. The gate cut portion enables this segmentation by creating distinct gate regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention introduces a vertical dimension to gate control by forming gates that extend into the channel region. The gate structure is positioned to provide three-dimensional control over the channel, moving beyond planar control to volumetric control, which enhances channel control in miniaturized devices.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Volume of moving object

If gate structure is made smaller to reduce FET size, then miniaturization is achieved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvegate structure sizeVSAvoidgate cut precision
Core Design Contradiction:
Volume of moving objectVSManufacturing precision

Solution Approach 1:

The gate cut portion is formed as a preliminary structure before final gate electrode deposition. This preliminary action defines the gate regions and simplifies subsequent manufacturing steps, reducing the precision requirements for later processes. The cut structure serves as a template for forming the final gate electrodes.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate cut portion acts as an intermediary structure between the channel region and the gate electrodes. This intermediary structure simplifies the manufacturing process by providing a pre-defined framework that guides electrode deposition and positioning, thereby reducing overall manufacturing precision requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If source/drain contact structure is formed around gate cut portion, then contact efficiency improves, but device complexity increases

Engineering Contradiction:
Improvecontact formation efficiencyVSAvoidcontact structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The source/drain contact structure is merged with the gate cut portion to form an integrated contact system. The contact structure wraps around the gate cut portion, combining contact formation with gate definition into a single structural feature. This merging improves contact efficiency while avoiding the need for separate, complex contact and gate formation processes.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20250203918A1Gate cut structure for transistors
Publication Date: 2025.06.19 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20250203918A1 patent drawing
  • US20250203918A1 patent drawing
  • US20250203918A1 patent drawing

AI summary

A semiconductor device includes at least one transistor including a gate structure and a source/drain region, and a source/drain contact structure disposed on the source/drain region. The source/drain contact structure includes a first metal layer and second metal layer disposed on the first metal layer, wherein the second metal layer includes a different material than the first metal layer and is disposed on an uppermost surface of the first metal layer. A gate cut portion is disposed through a part of the gate structure, wherein the source/drain contact structure is disposed on a side of the gate cut portion.