Gate Cut Liner Structure for Low Oxidation and Parasitic Capacitance
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Solution Overview
Problem
As integrated circuits scale down in size, forming semiconductor devices with gate cuts that prevent oxidation of the gate electrode and reduce parasitic capacitance becomes challenging due to the use of oxygen-containing dielectric materials, which can cause oxidation and shift electrical properties.
Innovation Solution
A gate cut structure is implemented with a dielectric liner having a higher percentage of silicon-hydrogen bonds compared to silicon-nitrogen bonds, formed using an argon-only plasma initially, followed by a nitrogen plasma, and filled with a medium-to-low-k dielectric material to reduce oxidation and parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-generated harmful factors
If oxygen-containing dielectric material is used to fill gate cut, then parasitic capacitance is reduced, but gate electrode oxidation occurs and electrical properties shift
Solution Approach 1:
A dielectric liner is introduced as an intermediary layer between the oxygen-containing dielectric fill and the gate electrode. This liner acts as a protective barrier that prevents direct contact between oxygen and the gate electrode, thereby preventing oxidation while still allowing the use of low-k dielectric material to reduce parasitic capacitance.
Solution Approach 2:
The gate cut structure uses a composite material approach by combining two different dielectric materials: a dielectric liner (such as silicon nitride or silicon oxynitride) and a low-k dielectric fill material. This composite structure allows each material to perform its specific function - the liner provides oxidation protection while the fill reduces parasitic capacitance.
2Productivity
If gate cut is formed to isolate adjacent transistors, then device density increases, but oxidation and parasitic capacitance control becomes challenging
Solution Approach 1:
The gate cut structure is segmented into two distinct parts: a dielectric liner layer and a dielectric fill layer. This segmentation allows independent optimization of each layer - the thin liner provides oxidation protection while the fill material provides parasitic capacitance reduction, enabling precise control over both oxidation and capacitance parameters.
Solution Approach 2:
Different regions of the gate cut structure have different material properties tailored to local requirements. The dielectric liner region provides oxidation protection where it contacts the gate electrode, while the dielectric fill region provides parasitic capacitance reduction in the bulk of the gate cut. This local differentiation of material quality enables simultaneous control of both oxidation and capacitance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively protects the gate electrode from oxidation and reduces parasitic capacitance, enhancing device performance with faster switching speeds and lower threshold voltage shifts.
Implementation Method 1
formed using an argon-only plasma initially, followed by a nitrogen plasma
Implementation Method 2
dielectric liner having a higher percentage of silicon-hydrogen bonds compared to silicon-nitrogen bonds
Implementation Method 3
filled with a medium-to-low-k dielectric material to reduce oxidation and parasitic capacitance
Data Source
AI summary
Techniques are provided herein to form semiconductor devices that include one or more gate cuts having an improved liner structure to prevent oxidation of the gate electrode. A semiconductor device includes a gate structure around or otherwise on a semiconductor region. The gate structure may be interrupted, for example, between two transistors with a gate cut that extends through an entire thickness of the gate structure and includes dielectric material to electrically isolate the portions of the gate structure on either side of the gate cut. In an example, the gate cut includes a silicon nitride dielectric liner with a higher percentage of Si—H bonds compared to Si—N bonds at an interface between the dielectric liner and the gate structure. The liner may also include a higher percentage of Si—N bonds compared to Si—H bonds at an interface between the dielectric liner and a dielectric fill on the dielectric liner.