Gate-Cut Plug Structure for Even Transistor Layer Surfaces
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Legacy semiconductor manufacturing processes result in uneven transistor surfaces due to etching of dielectric materials between gates, leading to difficulties in subsequent processing stages.
Innovation Solution
A plug structure is introduced between two gates, comprising a cap surrounded by a liner and a dielectric base, which remains intact during etching processes, maintaining an even surface by electrically and physically isolating the cap from the gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dielectric material is used to fill between two gates, then the gap is filled, but the etching process etches down the dielectric and leaves a hole, resulting in an uneven surface
Solution Approach 1:
The plug structure is segmented into three distinct parts: a base portion (dielectric material), a cap portion (metal or other material), and a liner portion (insulating layer) that surrounds the cap. This segmentation allows each part to serve a specific function: the base provides structural support, the cap maintains surface levelness during etching, and the liner provides electrical isolation. The segmented design resolves the contradiction by enabling the plug to withstand etching while maintaining an even surface.
Solution Approach 2:
The plug employs composite materials with different properties: the base is made of dielectric material suitable for filling, the cap is made of metal or other etch-resistant material to maintain surface levelness, and the liner is made of insulating material for electrical isolation. This composite structure allows the plug to simultaneously achieve surface evenness, etching resistance, and electrical isolation, resolving the technical contradiction between manufacturing precision and ease of manufacture.
2Ease of manufacture
If a simple dielectric fill is used, then the manufacturing process is simple, but subsequent etching creates holes and uneven surfaces that cause difficulties in later stages
Solution Approach 1:
The plug structure is designed in advance with a cap portion made of etch-resistant material and a liner portion for electrical isolation. This preliminary action ensures that when subsequent etching processes are performed, the plug already has the necessary properties to maintain surface evenness and provide electrical isolation, preventing the need for complex repairs or adjustments in later manufacturing stages.
Solution Approach 2:
By using composite materials (dielectric base, metal cap, insulating liner), the plug achieves both ease of manufacture through standard materials and high reliability for subsequent processing. The composite structure ensures surface quality is maintained while allowing fabrication using conventional semiconductor manufacturing techniques.
3Manufacturing precision
If the plug structure with cap and liner is used, then surface evenness is maintained and electrical isolation is provided, but the device structure becomes more complex
Solution Approach 1:
The plug structure applies local quality by providing different properties in different regions: the base portion provides structural support and filling, the cap portion provides surface levelness and etching resistance, and the liner portion provides electrical isolation. This localized functional distribution achieves high manufacturing precision without requiring the entire device structure to be overly complex.
Solution Approach 2:
The plug structure employs nesting by placing the cap portion inside the liner portion, which in turn surrounds the base portion. This nested arrangement efficiently provides multiple functions (structural support, surface evenness, electrical isolation) within a compact structure, minimizing the increase in device complexity while achieving high manufacturing precision.
Data Source
AI summary
Embodiments described herein may be related to apparatuses, processes, systems, and/or techniques for forming a plug between two gates within a transistor layer of a semiconductor device. In embodiments, the plug includes a cap at a top of the plug and a liner surrounding at least a portion of the cap, and a base below the cap and the liner. The cap may include a metal. A top of the cap may be even with, or substantially even with, the top of the two gates. The plug may provide a more even surface at a top of a transistor layer where the plug fills in for a gate cut. Other embodiments may be described and/or claimed.