Gate Dielectric Dipole Engineering for Threshold and Breakdown Control
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in controlling the threshold voltage and improving the breakdown voltage of gate dielectric layers, particularly in FinFETs, due to the integration of dipole-inducing elements and residual impurities.
Innovation Solution
A process involving the formation of a doping layer with dipole-inducing elements on a gate dielectric layer, followed by annealing to drive these elements through the layer, subsequent removal, and the use of a sacrificial layer to interact with residuals, culminating in a capping layer to enhance interface quality and reduce breakdown voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dipole-inducing elements are integrated into the gate dielectric layer to control threshold voltage, then threshold voltage control is improved, but breakdown voltage deteriorates due to residual impurities and interface defects
Solution Approach 1:
A sacrificial layer is formed on the gate dielectric layer before final processing to preemptively capture and remove residual dipole-inducing elements. This preliminary action prevents impurities from compromising the breakdown voltage while maintaining the threshold voltage control benefits of dipole-inducing elements.
Solution Approach 2:
The sacrificial layer selectively interacts with and removes residual dipole-inducing elements from the gate dielectric layer interface. This extraction process eliminates harmful impurities that would otherwise reduce breakdown voltage, while preserving the beneficial dipole interfaces needed for threshold voltage control.
2Productivity
If feature size is reduced to increase integration density, then integration density is improved, but threshold voltage control and breakdown voltage deteriorate
Solution Approach 1:
The sacrificial layer is selectively positioned and removed from specific regions of the gate dielectric layer, enabling localized control of dipole-inducing elements. This allows different areas to have optimized characteristics for threshold voltage control while maintaining overall breakdown voltage integrity in scaled devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for controlled threshold voltage modulation and improved breakdown voltage of the gate dielectric layer, enhancing the reliability and performance of FinFETs by managing dipole interfaces and residual impurities.
Implementation Method 1
annealing to drive these elements through the layer
Data Source
AI summary
In an embodiment, a method includes: forming a gate dielectric layer on an interface layer; forming a doping layer on the gate dielectric layer, the doping layer including a dipole-inducing element; annealing the doping layer to drive the dipole-inducing element through the gate dielectric layer to a first side of the gate dielectric layer adjacent the interface layer; removing the doping layer; forming a sacrificial layer on the gate dielectric layer, a material of the sacrificial layer reacting with residual dipole-inducing elements at a second side of the gate dielectric layer adjacent the sacrificial layer; removing the sacrificial layer; forming a capping layer on the gate dielectric layer; and forming a gate electrode layer on the capping layer.