Gate Dielectric Nitrogen Dipoles for Multi-Threshold FinFETs
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Solution Overview
Problem
Providing multigate devices, such as fin-like field effect transistors and gate-all-around transistors, with multiple threshold voltages is challenging due to their small size, which limits the ability to tune their threshold voltages using different work function metals, and existing dipole engineering techniques are not entirely satisfactory for further scaling.
Innovation Solution
The implementation of volume-less dipole engineering techniques that incorporate dipole dopants and nitrogen into gate dielectrics to achieve multi-threshold voltage tuning, allowing for different threshold voltages without the need for patterning work function metals, by forming a dipole dopant source layer, a nitrogen-blocking mask, performing a nitrogen-containing thermal drive-in process, and removing these layers afterwards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different work function metals are used to tune threshold voltages, then multiple threshold voltages can be achieved, but device complexity and manufacturing difficulty increase due to the need for patterning multiple metal layers
Solution Approach 1:
The patent extracts the threshold voltage tuning function from the work function metal layer and transfers it to the gate dielectric layer through dipole engineering. By incorporating dipole dopants (such as nitrogen) into the gate dielectric, the threshold voltage can be tuned without requiring different work function metals, thereby eliminating the complexity of patterning multiple metal layers while maintaining the capability to achieve multiple threshold voltages.
Solution Approach 2:
The patent introduces dipole dopants (nitrogen) as an intermediary substance in the gate dielectric layer to mediate the threshold voltage tuning. These dipole dopants create dipole moments that shift the threshold voltage, serving as a mediator between the gate electrode and channel, allowing threshold voltage control without direct modification of the work function metal.
2Productivity
If device dimensions are reduced for scaling, then production efficiency improves and costs decrease, but the ability to tune threshold voltages using different work function metals is limited due to minimal room available
Solution Approach 1:
The patent transitions the threshold voltage tuning mechanism from the horizontal dimension (work function metal layer composition and thickness) to the vertical dimension (dipole dopant concentration and distribution within the gate dielectric layer). By controlling the concentration and depth profile of nitrogen dipole dopants in the vertical direction, multiple threshold voltages can be achieved even in highly scaled devices with minimal lateral space.
Solution Approach 2:
The patent changes the tuning parameter from work function metal composition to dipole dopant concentration in the gate dielectric. By varying the concentration of nitrogen dipole dopants (e.g., from 0 to several atomic percentages) and their spatial distribution within the gate dielectric layer, a continuous range of threshold voltages can be achieved, providing the necessary adaptability in scaled devices.
3Adaptability or versatility
If dipole engineering techniques are implemented, then multiple threshold voltages can be achieved with minimal work function metals, but challenges arise when device stacking is implemented for further scaling
Solution Approach 1:
The patent segments the gate dielectric layer into multiple regions with different dipole dopant concentrations to accommodate stacked device structures. By creating spatially varying dipole dopant profiles (e.g., higher concentration in certain regions, lower in others), different threshold voltages can be achieved in different segments of the stacked structure, allowing each transistor in the stack to have independently tuned threshold voltages.
Solution Approach 2:
The patent applies local quality by creating non-uniform dipole dopant distribution within the gate dielectric layer. Different regions of the gate dielectric have different nitrogen concentrations, resulting in locally different threshold voltage characteristics. This allows transistors in stacked structures to have different threshold voltages based on their specific functional requirements, even though they share the same gate dielectric material.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables effective tuning of threshold voltages for transistors, maximizing performance and reliability by allowing for different threshold voltages in transistors while minimizing the need for work function metals, suitable for nano-sized transistors like FinFETs and GAA transistors, and optimizing gate stack design for advanced IC technology nodes.
Implementation Method 1
performing a nitrogen-containing thermal drive-in process
Implementation Method 2
volume-less dipole engineering techniques that incorporate dipole dopants and nitrogen into gate dielectrics
Data Source
AI summary
Dipole engineering techniques are disclosed that incorporate dipole dopant and/or nitrogen into gate dielectrics (e.g., high-k dielectric layers thereof) to realize multi-threshold voltage transistor tuning of transistors. The dipole engineering techniques include (1) forming a dipole dopant source layer over gate dielectrics of some transistors, but not other transistors, (2) forming a mask over gate dielectrics of some transistors, but not other transistors, (3) performing a nitrogen-containing thermal drive-in process, and (4) removing the dipole dopant source layer and the mask after the nitrogen-containing thermal drive-in process. The nitrogen-containing thermal drive-in process diffuses nitrogen and dipole dopant (n-dipole dopant and/or p-dipole dopant) into unmasked gate dielectrics having the dipole dopant source layer formed thereon, nitrogen into unmasked gate dielectrics, and dipole dopant into masked gate dielectrics having the dipole dopant source layer formed thereon. Masked gate dielectrics without the dipole dopant source layer formed thereon remain undoped.


