Gate Dielectric Nitrogen Segmentation for Leakage Reduction

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Solution Overview

Problem

Current methods for manufacturing semiconductor devices with multiple gate dielectric thickness layers result in non-uniform nitrogen profiles, leading to increased leakage current, particularly in high voltage devices with thicker gate dielectrics, reducing reliability.

Innovation Solution

A method involving the formation of masking layers over semiconductor substrates, exposure to nitrogen-containing plasma, and subsequent oxygen incorporation to create layers of varying gate dielectric thickness, ensuring uniform nitrogen distribution and reduced leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If non-thermal nitridation (plasma nitridation) is performed on gate dielectrics to reduce leakage current, then leakage current is suppressed, but nitrogen distribution becomes non-uniform, reducing device reliability

Engineering Contradiction:
Improveleakage currentVSAvoiddevice reliability
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The gate dielectric structure is segmented into multiple layers with different nitrogen concentrations. The method forms a first gate dielectric layer with high nitrogen content near the semiconductor substrate interface, and a second gate dielectric layer with lower nitrogen content above it. This layered segmentation allows each layer to serve different functions: the first layer provides effective leakage suppression at the critical interface, while the second layer maintains overall dielectric integrity and uniformity, thus resolving the contradiction between leakage suppression and reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by creating non-uniform nitrogen distribution in a controlled manner through selective nitridation of the first gate dielectric layer. The nitrogen concentration is locally optimized at the substrate interface where leakage occurs most, rather than uniformly throughout the entire gate dielectric. This localized nitrogen enrichment suppresses leakage current effectively while maintaining uniformity in the upper portion of the gate dielectric, thereby improving reliability.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If gate dielectric thickness is reduced to meet device performance requirements, then high performance is achieved, but leakage current increases, especially in high voltage devices

Engineering Contradiction:
Improvegate dielectric thickness controlVSAvoidleakage current
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent changes the nitrogen concentration parameter within the gate dielectric structure to achieve leakage suppression without increasing physical thickness. By introducing nitrogen atoms into the first gate dielectric layer through selective nitridation, the effective barrier against leakage current is enhanced. This allows thin gate dielectric structures to maintain low leakage characteristics, resolving the contradiction between achieving thin-dielectric performance and preventing leakage.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If multiple gate oxide processing is performed to integrate different thicknesses for core and I/O devices, then compatibility with different voltage requirements is achieved, but process complexity increases

Engineering Contradiction:
Improvevoltage compatibilityVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the first gate dielectric layer with selective nitridation before subsequent processing steps. This preliminary nitrogen incorporation establishes the low-leakage foundation early in the process, allowing later steps to focus on thickness differentiation for core and I/O devices without re-addressing leakage issues. This sequencing reduces overall process complexity while maintaining voltage compatibility across different device types.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of semiconductor devices by minimizing leakage current across different voltage regions, maintaining compatibility with existing processes and avoiding additional patterning steps.

Implementation Method 1

performing non-thermal nitridation (e.g., plasma nitridation) on the gate dielectrics

Methodology Applied
Scientific EffectPlasma nitridation: Plasma

Implementation Method 2

introducing nitrogen atoms into the gate dielectrics to suppress leakage currents

Methodology Applied
Scientific EffectNitrogen atom introduction: Absorption (physical)

Implementation Method 3

incorporating oxygen into the first layer of gate dielectric material located in the left active region

Methodology Applied
Scientific EffectOxygen incorporation: Absorption (physical)

Data Source

PatentUS7670913B2Method for forming ultra-thin low leakage multiple gate devices using a masking layer over the semiconductor substrate
Publication Date: 2010.03.02 TEXAS INSTRUMENTS INC
  • US7670913B2 patent drawing
  • US7670913B2 patent drawing
  • US7670913B2 patent drawing

AI summary

The present invention provides a method for manufacturing a semiconductor device having multiple gate dielectric thickness layers. The method, in one embodiment, includes forming a masking layer over a semiconductor substrate in a first active region and a second active region of a semiconductor device, patterning the masking layer to expose the semiconductor substrate in the first active region, and subjecting exposed portions of the semiconductor substrate to a nitrogen containing plasma, thereby forming a first layer of gate dielectric material over the semiconductor substrate in the first active region. The method, in that embodiment, may further include incorporating oxygen into the first layer of gate dielectric material located in the first active region, and then removing the patterned masking layer, and forming a second layer of gate dielectric material over the first layer of gate dielectric material in the first active region and over the semiconductor substrate in the second active region, thereby resulting in a first greater thickness gate dielectric in the first active region and a second lesser thickness gate dielectric in the second active region.