Gate Dielectric Repair via Selective Etching and Refilling
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Solution Overview
Problem
Tilted ion implantation in semiconductor manufacturing can cause damage to the gate dielectric layer, leading to increased gate leakage current, especially when implanting large-sized impurity ions, and conventional solutions like dielectric spacers do not completely eliminate these damages.
Innovation Solution
A method involving the selective etching of end portions of the gate dielectric layer followed by filling the gate dielectric material back into the gaps created, to remove potential damages caused by tilted ion implantation, thereby forming a damage-free gate dielectric layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tilted ion implantation is performed to form shallow junctions and suppress short channel effects, then device performance is improved, but damages on the gate dielectric layer occur causing increased gate leakage current
Solution Approach 1:
A dielectric spacer is deposited on the side walls of the gate stack before ion implantation to provide preliminary protection. The spacer is formed by depositing dielectric material and then performing anisotropic etching to remove material from the top surface while retaining it on the side walls, creating a protective barrier prior to the harmful ion implantation process.
Solution Approach 2:
The dielectric spacer acts as an intermediary layer between the ion implantation process and the gate dielectric layer. This intermediate structure absorbs or deflects the implanted ions, preventing direct damage to the gate dielectric while still allowing the ion implantation to proceed for forming source/drain regions.
2Object-affected harmful factors
If a dielectric spacer is deposited on side walls prior to ion implantation to protect the gate dielectric layer, then damages are alleviated, but it is impossible to completely eliminate the damages
Solution Approach 1:
The damaged portions of the gate dielectric layer are selectively removed through etching processes. By extracting only the damaged regions from the gate dielectric layer, the remaining undamaged portions maintain their integrity, and the device performance is restored or improved.
Solution Approach 2:
The gate dielectric layer is treated differently in different regions: the end portions are selectively etched to remove damages, while the central portions are preserved. This local differentiation allows the gate dielectric to have optimal properties in each region - damage-free at the ends and intact in the middle.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces gate leakage current by removing damages at the end portions of the gate dielectric layer, enhancing the performance and reliability of semiconductor devices.
Implementation Method 1
filling a material for the gate dielectric layer into the gaps
Implementation Method 2
filling a material for the gate dielectric layer into the gaps
Implementation Method 3
tilted ion implantation is often carried out... in forming source/drain regions for CMOS devices by the ion implantation process
Data Source
AI summary
A method for manufacturing a semiconductor device is disclosed. In one embodiment, the method comprises: forming a gate stack on a substrate, wherein the gate stack comprises a gate dielectric layer and a gate conductor layer; selectively etching end portions of the gate dielectric layer to form gaps; and filling a material for the gate dielectric layer into the gaps.


