Gate Dielectric Structure for Threshold Voltage Control in ICs
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Solution Overview
Problem
The challenge in developing integrated circuit (IC) devices is to optimize transistor structures for high operating speed and accuracy while minimizing structural damage during downscaling, particularly in achieving desired threshold voltages and electrical properties.
Innovation Solution
The IC device incorporates a gate dielectric film structure with a first and second gate dielectric film, where the second gate dielectric film is partially apart from the first, allowing for control of the effective work function and critical voltage of the transistor, and includes a high-k dielectric film without dipole dopants to prevent structural damage and enhance reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a single-layer gate dielectric film is used in downscaled transistors, then the device area is reduced, but the control of effective work function and threshold voltage becomes difficult
Solution Approach 1:
The gate dielectric film is divided into two separate layers: a first gate dielectric film in contact with the channel region and a second gate dielectric film partially apart from the first. This segmentation allows independent optimization of each layer's thickness and material properties, enabling precise control of the effective work function while maintaining downscaled device dimensions.
Solution Approach 2:
The second gate dielectric film is positioned at a different vertical level than the first gate dielectric film, creating a multi-level structure. This vertical dimensionality change allows the second film to influence the effective work function without increasing the horizontal device footprint, thus controlling threshold voltage while maintaining small device area.
2Manufacturing precision
If dipole dopants are added to high-k dielectric films to adjust threshold voltage, then the desired threshold voltage is achieved, but structural damage occurs in the gate dielectric film
Solution Approach 1:
The harmful dipole dopants are extracted from the high-k dielectric film structure. Instead of doping the high-k film with dipole materials, the patent uses a combination of undoped high-k dielectric film and separately positioned gate dielectric films, eliminating the structural damage caused by dipole dopant incorporation while still achieving threshold voltage control through the multi-layer configuration.
Solution Approach 2:
The first and second gate dielectric films act as intermediaries to achieve threshold voltage control without requiring dipole dopants in the high-k film. These separate dielectric layers mediate the electrical characteristics, allowing precise work function adjustment while preserving the structural integrity of the high-k dielectric material.
3Manufacturing precision
If the gate dielectric film structure is optimized for threshold voltage control, then electrical properties are improved, but the device complexity increases
Solution Approach 1:
Different regions of the gate dielectric structure have different qualities: the first gate dielectric film has specific thickness and material properties optimized for channel interface quality, while the second gate dielectric film is positioned and dimensioned to optimize effective work function control. This local quality differentiation achieves superior electrical properties without requiring complex multi-material stacks throughout the entire structure.
Solution Approach 2:
The second gate dielectric film is partially positioned apart from the first film rather than forming a complete continuous layer. This partial action approach provides sufficient work function control through the region where it overlaps with the first film, avoiding the need for a fully continuous second layer and thereby reducing structural complexity while maintaining electrical performance.
Data Source
AI summary
An integrated circuit (IC) device is provided. The IC device includes: a channel region on a substrate; a gate on the channel region; a first gate dielectric film including a first portion and a second portion, the first portion being in contact with the channel region between the channel region and the gate, and the second portion being apart from the channel region; and a second gate dielectric film including a third portion, the third portion being in contact with the second portion of the first gate dielectric film at a vertical level farther from the substrate than a top surface of the gate.


