Gate Drive Circuit Embedded in Display Panel Insulation Layers
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Solution Overview
Problem
The increasing pixel resolution in display panels requires a larger gate drive circuit region, leading to a significant non-display and bezel region, which hinders the miniaturization of display devices like LCDs and OLEDs.
Innovation Solution
The integration of a gate drive circuit using Low Temperature Poly Silicon (LTPS) TFTs embedded within an internal insulation layer and LTPS layer of the display panel, allowing image display pixels to overlap and cover the entire surface, thereby reducing the non-display and bezel regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate drive circuit region is enlarged to accommodate higher pixel resolution, then the reliability of control signals is improved, but the non-display region and bezel size increase
Solution Approach 1:
The gate drive circuit is embedded within the image display region by nesting it inside the pixel structure. The circuit is constructed within the internal insulation layer and LTPS layer, allowing the pixel structure to contain the drive circuit while maintaining the overall pixel footprint, thus eliminating the need for separate non-display regions.
Solution Approach 2:
The invention transitions from a planar layout where the gate drive circuit occupies lateral space to a vertical integration approach. By constructing the circuit within the internal insulation layer and LTPS layer of the pixel structure, the circuit is positioned in the vertical dimension rather than expanding horizontally, thereby reducing bezel size while maintaining circuit functionality.
2Reliability
If more TFTs are constructed in the gate drive circuit to improve reliability, then the control signal reliability is improved, but the region required for the gate drive circuit increases
Solution Approach 1:
Multiple TFTs are integrated within the gate drive circuit by nesting them inside the pixel structure's internal insulation layer and LTPS layer. This allows a greater number of TFTs to be packed into the same lateral footprint by utilizing the vertical stacking capability of the layered structure, thereby improving reliability without increasing the circuit region.
Solution Approach 2:
The invention applies different structural qualities to different regions within the pixel. The internal insulation layer and LTPS layer are specifically engineered to accommodate the gate drive circuit TFTs with optimized local properties, allowing high-density integration of multiple TFTs in a confined space while maintaining their functional reliability.
3Measurement precision
If the integration degree of pixels is increased to achieve higher resolution, then the image quality is improved, but the region of the gate drive circuit must be further enlarged
Solution Approach 1:
As pixel integration density increases with higher resolution, the gate drive circuit is relocated from horizontal expansion to vertical integration within the pixel layers. This dimensional transition allows the circuit to accommodate more TFTs needed for high-resolution control without increasing the lateral area, thereby supporting higher pixel integration degrees.
Solution Approach 2:
The gate drive circuit is nested within the pixel structure itself, allowing the circuit to scale with pixel density. As more TFTs are needed for higher resolution, additional TFTs are integrated into the nested circuit structure within the same pixel footprint, enabling the circuit region to scale efficiently with resolution requirements.
Data Source
AI summary
A display panel including a drive circuit and an image display device using the same are disclosed. The display panel provided with a drive circuit includes a substrate, a plurality of clock lines and a link line, a plurality of switching elements, a plurality of insulation layers, and an image display surface. The clock lines and link line are formed in a link line unit on the substrate. The switching elements are formed in a gate drive circuit region on the substrate. The insulation layers include the plurality of clock lines, the link line, and the plurality of switching elements. The image display surface includes a plurality of sub-pixels formed over the entire surface of the plurality of insulation layers such that an image is displayed thereon.