Gate Drive Circuit CMOS Stability Against Threshold Drift
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Solution Overview
Problem
Conventional gate drive circuits using single N-type or P-type thin film transistors at key nodes are prone to threshold voltage drift due to long-term electrical stress, leading to instability.
Innovation Solution
A gate drive circuit comprising cascaded units with a combination of P-type and N-type thin film transistors in a CMOS structure, where the pull-up and pull-down modules alternate to prevent prolonged high potentials, ensuring that nodes do not remain at high voltage for extended periods, thus stabilizing the thin film transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single N-type or P-type thin film transistor is used at key nodes in conventional gate drive circuits, then the device complexity is reduced, but threshold voltage drift occurs due to long-term electrical stress, leading to instability
Solution Approach 1:
The patent combines P-type and N-type thin film transistors in a complementary CMOS configuration at key nodes. This merging of opposite-type transistors creates a balanced structure where the electrical stress on each transistor is reduced and alternates, preventing the continuous unidirectional stress that causes threshold voltage drift in single-type transistor designs.
Solution Approach 2:
The patent employs a composite transistor structure using both P-type and N-type thin film transistors together in the gate drive circuit. This composite approach leverages the complementary electrical characteristics of opposite-type transistors to create a more stable operating condition at key nodes, where the alternating stress patterns prevent degradation of individual transistor parameters.
2Power
If P-type thin film transistors output constant-voltage high potential continuously, then the driving capability is improved, but the thin film transistors experience long-term electrical stress causing threshold voltage drift
Solution Approach 1:
The patent implements periodic switching between P-type and N-type transistor dominance at key nodes. Instead of one transistor type continuously maintaining high potential, the circuit alternates between P-type and N-type transistors in a periodic manner. This periodic action maintains the necessary driving capability while distributing the electrical stress over time, preventing continuous unidirectional stress that causes threshold voltage drift.
Solution Approach 2:
The patent introduces dynamic switching between different transistor configurations based on operational phases. The gate drive circuit dynamically alternates which transistor type (P-type or N-type) is active at key nodes, transforming the static continuous-stress condition into a dynamic alternating-stress condition. This dynamics allows maintaining strong driving capability while preventing threshold voltage drift through stress distribution.
Data Source
AI summary
A gate drive circuit and a display panel are provided. A pull-up module and a pull-down module of the gate drive circuit output a constant-voltage high potential to a second node, a third node, and a n-th stage gate drive signal through a P-type thin film transistor and output constant-voltage low potential through a N-type thin film transistor to the second node, the third node, and an n-th gate drive signal, thereby improving the stability of the output signal of the thin film transistor connected to the gate drive circuit and the key node.