Gate Drive Circuit Timing for Accurate Dead Time and Boost Control
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Solution Overview
Problem
Existing drive circuits for high-side and low-side transistors face challenges in accurately generating dead times and boost periods to prevent simultaneous conduction, leading to inefficiencies and electromagnetic interference (EMI).
Innovation Solution
A drive circuit utilizing multiple current sources and sinks, controlled by a logic and control circuit, to alternately generate and stop source and sink currents with precise dead times and boost periods, ensuring smooth transitions and improved accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single current source is used to generate both high-level and low-level currents, then device complexity is reduced, but manufacturing precision and reliability of current timing control deteriorate
Solution Approach 1:
The current source is divided into multiple independent current sources (first current source, second current source, third current source, fourth current source) that operate independently. Each current source is controlled by separate control signals (first control signal, second control signal, third control signal, fourth control signal) to generate and control high-level and low-level currents with precise timing, eliminating the timing control inaccuracies inherent in single current source designs.
2Reliability
If dead time is extended to ensure proper transistor switching, then reliability of preventing through current increases, but productivity and switching efficiency deteriorate due to increased delay periods
Solution Approach 1:
The dead time period is made dynamic rather than fixed. The control circuit adjusts the duration of dead time based on real-time detection of transistor switching states and current flow conditions. This allows the system to maintain sufficient dead time for reliable through current prevention while minimizing unnecessary delay periods, thereby optimizing switching efficiency and productivity.
Solution Approach 2:
The control circuit incorporates feedback mechanisms that monitor the switching states of transistors and the flow of currents in real-time. Based on this feedback, the control circuit dynamically adjusts the timing and duration of dead time periods, ensuring that dead time is extended only when necessary to prevent through current, while reducing dead time when switching conditions allow, thus maintaining both reliability and productivity.
3Speed
If high-level current flows continuously during transistor turn-on, then switching speed increases, but electromagnetic interference and energy loss increase
Solution Approach 1:
The high-level current flow is implemented as a periodic action rather than continuous flow. The current flows in controlled pulses during the turn-on transition and is interrupted during dead time periods and turn-off transitions. This periodic current flow pattern maintains fast switching speeds during necessary transitions while eliminating continuous current flow that causes electromagnetic interference and unnecessary energy loss.
Data Source
AI summary
The present disclosure provides a drive circuit whereby dead times and boost periods can be generated accurately. A drive circuit includes: a drive terminal; a first source current source to generate a first source current; a second source current source to generate a second source current; a first sink current source to generate a first sink current; a second sink current source to generate a second sink current; a logic circuit to generate a source drive command and a sink drive command in accordance with a clock; and a control circuit to generate a source boost signal and a sink boost signal in accordance with the clock.