Semiconductor Gate Drive Circuit with Delayed Stepped Waveform Control
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Solution Overview
Problem
Generating a gate drive waveform for power semiconductor devices requires high-speed digital-to-analog converters (DACs) and large memory capacity, which is inefficient and costly.
Innovation Solution
The implementation of a delay circuit that receives signals at intervals and outputs them after a delay time, allowing for the generation of a desired gate voltage waveform with reduced memory capacity and low digital output rate by controlling the number of turned-on transistors over time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a high-speed DAC and large memory capacity are used to generate gate drive waveform, then waveform generation capability is improved, but device complexity and cost increase
Solution Approach 1:
The patent divides the gate drive waveform generation into multiple discrete voltage levels (e.g., 0V, V/2, V) that can be applied in sequence. Instead of using a high-speed DAC to generate continuous analog waveforms, the system segments the waveform into stepped voltage transitions controlled by switching multiple power semiconductor devices in series. This segmentation approach reduces the memory capacity needed to store waveform data and eliminates the need for high-speed DACs.
Solution Approach 2:
The patent employs periodic switching of power semiconductor devices to generate the gate drive waveform. By alternately turning on and off multiple devices in a controlled sequence, the system creates the desired voltage transitions through periodic action rather than continuous high-speed digital-to-analog conversion. This periodic switching approach simplifies the hardware requirements while maintaining waveform generation capability.
2Reliability
If complicated gate drive waveform is input to control power semiconductor device, then device performance is improved, but control complexity increases
Solution Approach 1:
The patent introduces an intermediary control system that translates complex waveform requirements into simple switching commands for power semiconductor devices. The control circuit acts as an intermediary between the desired gate drive waveform and the actual device operation, using multiple switching devices in series to create the complicated waveform through coordinated simple on/off actions. This intermediary approach maintains device performance while simplifying the control architecture.
Solution Approach 2:
The control complexity is segmented by dividing the gate drive waveform generation into independent switching operations of multiple power semiconductor devices. Each device is controlled individually with simple on/off commands, but their combined action produces the complicated waveform needed for optimal device performance. This segmentation of control functions reduces the complexity of individual control signals while achieving the desired overall waveform.
Data Source
AI summary
Electronic circuitry includes a control circuit controlling a drive circuit for a semiconductor device; and a delay circuit receiving a first signal instructing the drive circuit to drive the semiconductor device with first driving force and output the first signal to the control circuit. The delay circuit receives a second signal at an interval of a first time or “n” times of the first time after the first signal is received, “n” being an integer greater than or equal to 2, and the second signal instructing the drive circuit to drive the semiconductor device with second driving force, delays outputting of the second signal for a delay time shorter than the first time, and outputs the second signal to the control circuit after the first signal is outputted and further after the first time or “n” times of the first time and the delay time elapses.