Gate-Drive Control for SiC and IGBT Desaturation Turn-Off

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Solution Overview

Problem

The high switching speed of SiC power semiconductor devices leads to voltage switching spikes and ringing due to stray inductance, which reduces their efficiency and can cause damage, and existing methods to mitigate these issues either reduce efficiency or are ineffective during desaturation conditions.

Innovation Solution

A gate-drive controller with a master control unit that implements multi-level turn-off and turn-on strategies, using intermediate voltage levels and timed transitions to manage switching, and monitors Vee or Vds to optimize the turn-off process, especially during desaturation conditions, to minimize voltage spikes and maintain efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If high switching speed is used in SiC power semiconductor devices, then efficiency is improved and switching losses are reduced, but voltage switching spikes and ringing occur due to stray inductance which can cause damage

Engineering Contradiction:
Improveswitching lossesVSAvoidvoltage switching spikes and ringing
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The gate drive signal is segmented into multiple voltage levels (e.g., 0V, 10V, 15V, 20V) applied in sequence during turn-on, and multiple intermediate levels during turn-off. This segmentation of the switching process allows controlled reduction of voltage spikes by stepping through intermediate states rather than abrupt transitions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Before full turn-on, the gate voltage is preliminarily applied in steps to prepare the device for switching. Before turn-off, intermediate voltage levels are applied in advance to gradually reduce current and minimize voltage spikes. This preliminary action prevents abrupt transitions that cause ringing.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If existing methods are used to mitigate voltage spikes, then damage is reduced, but efficiency is reduced

Engineering Contradiction:
Improvedamage preventionVSAvoidefficiency
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The gate resistance is dynamically adjusted during switching transitions. During turn-on, resistance is kept low for fast switching and high efficiency. During turn-off, resistance is increased to control voltage spikes. This dynamic adjustment maintains efficiency while preventing damage.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The gate voltage parameters are changed in multiple steps rather than single transitions. Turn-on uses increasing voltage steps (0V→10V→15V→20V), and turn-off uses decreasing voltage steps with intermediate levels. This parameter change strategy reduces voltage spikes without significantly impacting efficiency.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If multi-level turn-off strategy is implemented, then voltage spikes are reduced, but device complexity increases

Engineering Contradiction:
Improvevoltage spikesVSAvoidcontrol circuit complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The control system uses feedback from voltage sensors to automatically adjust gate drive levels. When voltage spikes are detected, the system self-corrects by modifying subsequent gate pulse characteristics. This self-service approach reduces the need for complex external control circuitry.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

Voltage feedback from the power device is used to monitor switching transitions. When desaturation or excessive voltage is detected, the feedback signal triggers modified gate drive sequences. This feedback mechanism enables automatic protection without requiring complex external control systems.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11095281B2Gate drive control method for SiC and IGBT power devices to control desaturation or short circuit faults
Publication Date: 2021.08.17 MICROCHIP TECHNOLOGY INC
  • US11095281B2 patent drawing
  • US11095281B2 patent drawing
  • US11095281B2 patent drawing

AI summary

A gate-drive controller for a power semiconductor device includes a master control unit (MCU) and one or more comparators that compare the output signal of the power semiconductor device to a reference value generated by the MCU. The MCU, in response to a turn-off trigger signal, generates a first intermediate drive signal for the power semiconductor device and generates a second intermediate drive signal, different from the first drive signal, when a DSAT signal indicates that the power semiconductor device is experiencing de-saturation. The MCU generates a final drive signal for the power semiconductor when the output signal of the one or more comparators indicates that the output signal of the power semiconductor device has changed relative to the reference value. The controller may also include a timer that causes the drive signals to change in predetermined intervals when the one or more comparators do not indicate a change.