Gate Drive Circuit With Dual Off-Voltage Holding for LCD Reliability

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Solution Overview

Problem

In liquid crystal display (LCD) apparatuses, the integration of gate drivers on amorphous silicon gate substrates leads to increased off-current at zero gate-source voltage, causing defects like crosstalk and gate block errors, which affect display quality.

Innovation Solution

A gate drive circuit with multiple stages, each comprising a charging section, driving section, discharging section, holding section, and holding control section, that apply different off-voltages to improve transistor off-characteristics by managing voltage potentials and preventing floating.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the gate driver is integrated on a display substrate in an amorphous silicon gate form to decrease the size and enhance productivity, then the device size is reduced and manufacturing efficiency is improved, but the off-current of transistors increases when gate-source voltage is about 0V, causing display defects

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidtransistor off-characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies parameter changes by introducing multiple off-voltage levels (first off-voltage and second off-voltage) instead of a single off-voltage level. The holding section holds the first node to the first off-voltage, while the holding control section holds the holding section to the second off-voltage through a second node. This multi-level voltage parameter approach reduces off-current and prevents display defects while maintaining the integrated gate driver structure.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If a single off-voltage is applied to the transistor to simplify the circuit structure, then the device complexity is reduced, but the off-characteristics of the transistor deteriorate leading to increased off-current and display defects

Engineering Contradiction:
Improvecircuit structureVSAvoidtransistor off-characteristics
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the voltage control function into multiple independent sections: a holding section that holds the first node to the first off-voltage, and a holding control section that holds the holding section to the second off-voltage. This segmentation allows different off-voltage levels to be applied at different circuit nodes, improving transistor off-characteristics while maintaining a structured and manageable circuit design.

Inventive Principle:
Principle #1Segmentation

3Ease of operation

If the holding section is not controlled to a specific off-voltage, then the circuit operation is simplified, but the holding section floats causing unstable voltage potential and degraded circuit reliability

Engineering Contradiction:
Improvecircuit operationVSAvoidvoltage stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent applies preliminary action by proactively controlling the holding section to the second off-voltage through the holding control section before any potential floating or instability can occur. This preemptive voltage control ensures the holding section maintains a stable voltage potential throughout operation, preventing reliability issues before they arise.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8643584B2Gate drive circuit and display apparatus having the same
Publication Date: 2014.02.04 SAMSUNG DISPLAY CO LTD
  • US8643584B2 patent drawing
  • US8643584B2 patent drawing
  • US8643584B2 patent drawing

AI summary

A gate drive circuit includes a plurality of stages connected one after another to each other. Each of the stages includes a charging section, a driving section, a discharging section, a holding section and a holding control section. The driving section pulls up a high level of a first clock signal to output a gate signal. The discharging section discharges a voltage potential of a first node to a first off-voltage. The holding section holds a voltage potential of the first node to the first off-voltage. The holding control section receives the first clock signal and a second clock signal. The holding control section holds a voltage potential of the holding section to a second off-voltage through a second node in accordance with the second clock signal to prevent floating of the holding section.