Gate Drive Circuit Dual Gate Line Scanning Area Reduction
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Solution Overview
Problem
The existing gate drive circuits in liquid crystal displays have a large area due to each gate drive unit only scanning one gate line, which reduces the effective display area.
Innovation Solution
A gate drive circuit design where each gate drive unit drives two adjacent gate lines, incorporating a clock signal input terminal, signal input and output terminals, phase inverter modules, intermediate signal generation, and driving modules to efficiently scan both gate lines, reducing the overall area occupied.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If each gate drive unit scans only one gate line, then the control is simple, but the area of the gate drive circuit becomes large
Solution Approach 1:
Each gate drive unit is designed to drive two adjacent gate lines simultaneously, making the gate drive unit multi-functional. This is achieved by providing two output terminals (first output terminal and second output terminal) that connect to two different gate lines, allowing one gate drive unit to perform the function of two separate units while reducing overall circuit area
2Area of stationary object
If each gate drive unit drives two adjacent gate lines, then the gate drive circuit area is reduced, but the signal routing becomes more complex
Solution Approach 1:
The gate drive circuit is segmented into multiple gate drive units, where each unit is responsible for driving two specific adjacent gate lines. This segmentation allows the complex task of driving multiple gate lines to be divided into manageable units, with each unit having dedicated input and output terminals for its assigned gate lines, thereby organizing the signal routing in a structured manner
3Area of stationary object
If the gate drive circuit area is reduced, then the effective display area increases, but the heat dissipation becomes more concentrated
Solution Approach 1:
The gate drive circuit is divided into multiple independent gate drive units that are distributed across the array substrate. Each unit drives a specific pair of adjacent gate lines, which disperses the heat generation across multiple locations rather than concentrating it in a single large circuit block, thereby improving heat dissipation while maintaining compact area
Data Source
AI summary
A gate drive circuit including cascaded gate drive units, an array substrate and a display device are provided. In each gate drive unit, a first phase inverter module is connected with first and second driving modules and an intermediate signal generation module, and is used for inverting a clock signal received by a clock signal input terminal; the intermediate signal generation module is connected with first and second signal input terminals, a clock signal input terminal, first and second signal output terminals and an output terminal of the first phase inverter module, and generates an intermediate signal under the control of control signals received by the first and the second signal input terminals, the clock signal and the inverted clock signal; the first and the second driving modules scan the respective gate lines connected thereto under the control of the inverted clock signal and the intermediate signal.