Gate Drive IC for Organic EL Displays with Bidirectional Buffer
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Solution Overview
Problem
The gate drive integrated circuit for organic EL displays has a high manufacturing cost due to the need for separate ICs supporting either cascade or multidrop connections, which complicates the manufacturing process and increases costs.
Innovation Solution
A gate drive integrated circuit that includes a connection mode control terminal and signal direction control terminals, allowing it to switch between cascade and multidrop connections, thereby simplifying the manufacturing process and reducing costs by supporting both connection modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate ICs are used for cascade and multidrop connections, then connection versatility is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The gate drive integrated circuit is designed with a universal architecture that can operate in both cascade connection mode and multidrop connection mode. The circuit includes a shift register with bidirectional output capability and control logic that responds to connection mode signals, allowing a single IC design to replace what would traditionally require two separate IC types, thereby reducing manufacturing costs and simplifying the supply chain while maintaining full functional versatility
Solution Approach 2:
The circuit incorporates dynamic switching capability through control signals that change the operational state of the shift register and output buffers based on the connection mode. The circuit can dynamically reconfigure its signal flow paths and output enable states to adapt to either cascade or multidrop connection requirements, providing mode-dependent functionality within a single static hardware design
2Adaptability or versatility
If separate ICs are used for cascade and multidrop connections, then connection versatility is improved, but manufacturing cost increases
Solution Approach 1:
The gate drive integrated circuit is designed with a universal architecture that can operate in both cascade connection mode and multidrop connection mode. The circuit includes a shift register with bidirectional output capability and control logic that responds to connection mode signals, allowing a single IC design to replace what would traditionally require two separate IC types, thereby reducing manufacturing costs and simplifying the supply chain while maintaining full functional versatility
Solution Approach 2:
The invention merges the functionality of two previously separate IC designs (one for cascade connection and one for multidrop connection) into a single integrated circuit. By combining the cascade connection logic and multidrop connection logic into one chip with mode-selectable operational paths, the patent eliminates the need for manufacturers to produce and stock multiple IC variants, directly reducing manufacturing complexity and cost
3Adaptability or versatility
If bidirectional buffers are added to support signal direction control, then connection versatility is improved, but device complexity increases
Solution Approach 1:
The output buffers are designed with dual functionality: they can operate as standard unidirectional buffers in multidrop mode, and as bidirectional buffers in cascade mode. The buffers include enable inputs that, when activated by cascade mode control signals, allow signal transmission in both directions through the same buffer stage, eliminating the need for separate bidirectional buffer components and reducing overall circuit complexity
Solution Approach 2:
The circuit changes its operational parameters (signal flow direction, buffer enable states, output drive states) based on the connection mode control signal. In cascade mode, the parameters are adjusted to enable bidirectional signal transmission through the shift register and buffers, while in multidrop mode, the parameters return to standard unidirectional operation, providing adaptive functionality without requiring hardware changes
Data Source
AI summary
A gate drive integrated circuit includes: clock terminals; a bidirectional buffer that is located between the clock terminals and controls the input-output direction of a clock signal; a connection mode control terminal that receives a connection mode control signal; and a pair of signal direction control terminals that receive a signal direction control signal, wherein the bidirectional buffer fixes the input-output direction of the clock signal to one direction in the case where the logic state of the connection mode control signal is a first logic state, and switches the input-output direction of the clock signal depending on the logic state of the signal direction control signal in the case where the logic state of the connection mode control signal is a second logic state different from the first logic state.