Gate Drive Circuit Multi-Off-Voltage Hold for LCD Leakage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In liquid crystal display (LCD) apparatuses, the integration of gate drivers on amorphous silicon substrates leads to increased off-current at zero gate-source voltage, causing defects like crosstalk and gate block issues, which affect display quality due to suboptimal off-characteristics of transistors.
Innovation Solution
A gate drive circuit with multiple stages, each comprising a charging section, driving section, discharging section, holding section, and holding control section, that applies different off-voltages to improve transistor off-characteristics by managing gate signals and clock signals to prevent floating and optimize voltage potentials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the gate driver is integrated on a display substrate in an amorphous silicon gate form to decrease the size of the LCD apparatus and enhance productivity, then the device size is reduced and manufacturing efficiency is improved, but the off-current of transistors increases when gate-source voltage is about 0V, causing display defects
Solution Approach 1:
The patent applies parameter changes by introducing multiple off-voltage levels (first off-voltage and second off-voltage) instead of a single off-voltage level. The holding section holds the signal of the first node to the first off-voltage, while the holding control section holds the signal of the holding section to the second off-voltage. This multi-level voltage parameter approach reduces off-current and prevents display defects while maintaining the integrated gate driver structure.
2Device complexity
If the gate drive circuit uses a single off-voltage level to simplify the circuit structure, then the device complexity is reduced, but the off-characteristics of transistors deteriorate leading to crosstalk and gate block defects
Solution Approach 1:
The patent segments the voltage control function into multiple independent sections: a holding section that maintains the first node at the first off-voltage, and a holding control section that maintains the holding section at the second off-voltage. This segmentation allows each section to be optimized independently for its specific function, achieving reliable off-characteristics without excessive overall complexity.
Solution Approach 2:
The patent extends the voltage control from a single-dimensional approach (one off-voltage level) to a multi-dimensional approach by introducing hierarchical voltage levels. The first off-voltage is applied to the first node, while the second off-voltage is applied to the holding section, creating a layered voltage control structure that improves off-characteristics.
3Device complexity
If the holding section is not controlled with a separate off-voltage, then the circuit structure is simpler, but the holding section floats and causes signal instability
Solution Approach 1:
The holding control section proactively prevents floating by continuously holding the holding section to the second off-voltage through the second node. This preliminary control action ensures that the holding section maintains a stable reference voltage level before any signal processing occurs, preventing instability and ensuring reliable operation.
Data Source
AI summary
A gate drive circuit includes a plurality of stages connected one after another to each other. Each of the stages includes a charging section, a driving section, a discharging section, a holding section and a holding control section. The driving section pulls up a high level of a first clock signal to output a gate signal. The discharging section discharges a voltage potential of a first node to a first off-voltage. The holding section holds a voltage potential of the first node to the first off-voltage. The holding control section receives the first clock signal and a second clock signal. The holding control section holds a voltage potential of the holding section to a second off-voltage through a second node in accordance with the second clock signal to prevent floating of the holding section.


