Power Transistor Gate Drive Short-Circuit Detection Beyond Miller Period

The patent applies dynamic timing window adjustment based on the Miller period. The detection circuit dynamically opens the detection window only during the Miller period when dVce/dt is minimal, and closes it during other periods when noise is more prevalent. This dynamic adaptation allows high-speed detection during the critical Miller period while filtering out noise during other periods, resolving the contradiction between speed and reliability.

The patent performs preliminary identification of the Miller period timing before conducting short-circuit detection. By pre-synchronizing the detection window with the expected Miller period timing, the system ensures that detection occurs at the optimal moment when noise is minimized, thereby achieving both high-speed protection and accurate detection without false positives.

The patent makes the existing gate drive circuit perform multiple functions: it simultaneously drives the power semiconductor device and detects short circuits by monitoring gate voltage during the Miller period. The gate drive circuit's existing components (gate resistor, gate capacitor) are utilized for both driving and detection purposes, eliminating the need for separate sense cells or high-voltage diodes, thus maintaining reliability while reducing complexity.

The patent enables the power semiconductor device's own gate drive circuit to perform self-diagnosis for short-circuit detection. By monitoring the gate voltage waveform characteristics (specifically the Miller period) that naturally occur during normal operation, the system uses the device's own operational characteristics for detection without requiring external diagnostic components, thereby achieving reliable detection with minimal added complexity.

The patent implements a dynamic detection window that is actively opened only during the Miller period and closed during other periods. This dynamic control prevents false detection by ensuring that the reference voltage comparison is performed exclusively when dVce/dt is minimal (during Miller period), rather than continuously. The simple threshold comparison is thus made reliable through dynamic temporal gating.

The patent maintains continuous monitoring of the gate voltage but applies the reference comparison only during the useful action window (Miller period). By continuously tracking the gate voltage waveform and selectively evaluating it only during the Miller period when detection is meaningful, the system achieves both simplicity and reliability - the simple threshold check is continuously available but only activates when conditions are right.