Gate Drive Mirror Clamp Circuit Without Detection Terminals
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Solution Overview
Problem
Existing gate driving circuits with mirror clamp functions require large IC packages for mirror clamp transistors, leading to high impedance and the need for detection terminals, which can diminish the effectiveness of suppressing erroneous transistor turning-on due to elevated gate voltages.
Innovation Solution
A gate driving circuit using discrete components, including a PNP transistor connected to the gate of the driving target transistor, a capacitor, and resistors, to provide a mirror clamp function without the need for a detection terminal, allowing for robust noise resistance and cost-effective, compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large IC packages are used for mirror clamp transistors, then the mirror clamp function can be provided, but high impedance is generated and detection terminals are required
Solution Approach 1:
The patent uses a discrete PNP transistor as a simplified copy of the integrated mirror clamp transistor function. The discrete transistor Q1 replicates the essential mirror clamp behavior without requiring the complex IC package structure, thereby reducing impedance and eliminating the need for detection terminals while maintaining the protective function against erroneous turning-on
Solution Approach 2:
The patent extracts the mirror clamp function from the integrated IC package and implements it using a separate discrete PNP transistor. This separation removes the problematic high impedance and detection terminal requirements associated with the IC package while preserving the core mirror clamp functionality through the discrete transistor connection to the gate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed circuit effectively suppresses erroneous transistor turning-on by efficiently managing gate voltage fluctuations, reducing heat generation, and improving the effectiveness of the mirror clamp function through a compact and low-impedance connection.
Implementation Method 1
turning on the mirror clamp transistor permits electric charge to be extracted from the gate of the driving target transistor via the mirror clamp transistor
Implementation Method 2
a capacitor, and resistors, to provide a mirror clamp function
Data Source
AI summary
A gate drive circuit (201) includes: a PNP transistor (Q1) having an emitter connected to a gate of a driven transistor (Q) and a collector connected to a ground application terminal; a capacitor (C1) having a first end connected to a base of the PNP transistor and a second end connected to the ground application terminal; a base-emitter resistor (R1) having a first end connected to the emitter of the PNP transistor and a second end connected to the base of the PNP transistor; an electric charge supplying portion (201A); an electric charge extracting portion (201B); a charging portion (201C); and a discharging portion (201D).