Gate Drive Circuit Mode Switching for Low-Power High-Refresh Displays

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Solution Overview

Problem

The increase in refresh frequency of display screens leads to increased power consumption, reducing standby time and user experience.

Innovation Solution

A drive control circuit and gate drive circuit are implemented, featuring cascaded drive control circuits and a display panel design that includes sub-pixels with pixel circuits and light emitting elements, utilizing transistors and capacitors to control power supply signals and scan signals, allowing for reduced power consumption through operational mode switching.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If refresh frequency is increased to improve display quality and responsiveness, then display performance is improved, but power consumption increases

Engineering Contradiction:
Improverefresh frequencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic operation mode switching for pixel circuits. Each pixel circuit can switch between first and second operation modes based on driving requirements. In the first operation mode, the pixel circuit operates with full functionality for high refresh rate displays. In the second operation mode, the pixel circuit reduces activity to lower power consumption, enabling the display to adapt between high performance and energy saving states

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes operational parameters of pixel circuits by switching between different operation modes. This involves modifying the state of transistors and capacitors within pixel circuits to achieve different functional states. The control circuit adjusts these parameters dynamically based on display needs, allowing the system to optimize between refresh frequency and power consumption

Inventive Principle:
Principle #35Parameter changes

2Speed

If high refresh rate is implemented to improve display responsiveness, then display quality is improved, but standby time decreases

Engineering Contradiction:
Improveresponse speedVSAvoidstandby time
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The system dynamically adjusts pixel circuit operation modes based on display requirements. When high responsiveness is needed, the display operates in first operation mode with full speed. When standby or low-activity periods occur, the system switches to second operation mode to extend standby time, creating a dynamic balance between response speed and battery life

Inventive Principle:
Principle #15Dynamics

3Loss of energy

If operational mode switching is implemented to reduce power consumption, then energy efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements multi-functionality within pixel circuits by enabling each circuit to perform multiple operations through mode switching. The same pixel circuit hardware performs different functions in first and second operation modes, eliminating the need for separate dedicated circuits for each function. This reduces overall device complexity while maintaining energy efficiency

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The control circuit automatically manages operational mode switching based on display requirements without requiring complex external control systems. The pixel circuits self-adjust their operation states through the control signal from the control circuit, enabling autonomous energy management while keeping the control architecture relatively simple

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12531031B2Drive control circuit, gate drive circuit and display panel
Publication Date: 2026.01.20 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12531031B2 patent drawing
  • US12531031B2 patent drawing
  • US12531031B2 patent drawing

AI summary

A drive control circuit includes an input circuit, a first output circuit and a first output control circuit. An input circuit is configured to control the potentials of a first node and a second node under the control of a signal input terminal and a clock signal terminal. The first output circuit is configured to provide a first power supply signal to a third node under the control of a first node or to provide a second power supply signal to a first output terminal under the control of a second node. The first output control circuit is configured to turn on or turn off the third node and the first output terminal under the control of the first control terminal.