Gate Drive Circuit With Stepwise Reset to Suppress Hot Carriers

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Solution Overview

Problem

Existing drive circuits generate hot carriers due to large potential differences between the drain and source electrodes of transistors, leading to transistor deterioration.

Innovation Solution

A drive circuit design that includes a node connected to a first transistor, a second transistor for charging the node, a third transistor with a source electrode at an intermediate voltage, and a fourth transistor with a gate-off voltage applied to its source electrode, reducing the drain-source voltage through stepwise discharge.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a transistor discharges a node with a large potential difference between drain and source electrodes, then the discharge function is achieved, but hot carriers are generated causing transistor deterioration

Engineering Contradiction:
Improvetransistor durabilityVSAvoidhot carrier generation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The discharge function is segmented into two stages using two transistors. The first transistor (third transistor in claim) performs initial discharge with an intermediate voltage applied to its source electrode, reducing the drain-source voltage. The second transistor (fourth transistor in claim) completes the discharge to the final gate-off voltage. This segmentation prevents large potential differences from occurring in a single transistor, thereby suppressing hot carrier generation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An intermediate voltage is introduced as a mediator between the gate-on voltage and gate-off voltage. This intermediate voltage is applied to the source electrode of the first discharge transistor, creating a stepped voltage transition. The intermediate voltage acts as a buffer that reduces the potential difference across the transistor during discharge, preventing hot carrier generation while still achieving the required discharge function.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the source electrode voltage is set to gate-off voltage during discharge, then complete reset is achieved, but large drain-source voltage causes hot carriers

Engineering Contradiction:
Improvetransistor durabilityVSAvoidhot carrier generation
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The discharge process is divided into two segmented stages: first, the intermediate voltage transistor discharges the node to a potential between gate-on and gate-off voltages; second, the gate-off voltage transistor completes the discharge. This segmentation ensures no single transistor experiences the full potential difference, suppressing hot carrier generation while achieving complete reset.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The source electrode voltage parameter is changed from a fixed gate-off voltage to a two-stage configuration: first an intermediate voltage (higher than gate-off), then gate-off voltage. This parameter change reduces the drain-source voltage in the first stage, preventing hot carrier generation while maintaining the ability to achieve complete discharge in the second stage.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260073886A1Drive circuit and display device
Publication Date: 2026.03.12 SHARP DISPLAY TECHNOLOGY CORP
  • US20260073886A1 patent drawing
  • US20260073886A1 patent drawing
  • US20260073886A1 patent drawing

AI summary

A unit circuit of a gate drive circuit includes first to fourth transistors. The first transistor outputs a drive signal to a gate line. The second transistor is a transistor to which a set signal is inputted and which charges a node. The third transistor is a transistor to which a first reset signal is inputted and which discharges the node to a ground potential. The fourth transistor is a transistor to which a second reset signal supplied at a time point later than the first reset signal is inputted and which discharges the node to a gate-off voltage.