Gate Driver Circuit Adaptive Charge Sharing for Power Reduction
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Solution Overview
Problem
Existing gate driver circuits consume high power due to the need for dynamic control and adjustment of the system circuit, which can be mitigated by implementing a charge sharing function, but current methods require direct designation of channels for charge sharing, leading to inefficiencies.
Innovation Solution
A gate driver circuit and method that automatically applies a charge sharing function based on the operation of a clock signal without pre-designating channels, using a control circuit to output gate clock and connection control signals, and charge sharing switches to connect selected buffers through a charge sharing line, allowing adaptive selection of charge sharing channels based on clock signal phases.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dynamic control and adjustment of the system circuit is implemented to drive gate lines, then normal image output is achieved, but power consumption increases
Solution Approach 1:
The gate driver circuit automatically selects buffers for charge sharing based on the clock signal phase without external intervention. The control circuit monitors the clock signal and autonomously activates the charge sharing function, allowing the system to self-regulate power consumption while maintaining proper gate line driving for normal image output.
Solution Approach 2:
The circuit dynamically changes the operational state of buffers by switching between normal operation and charge sharing modes based on clock signal phase. This parameter change allows the system to reduce power consumption during specific phases while maintaining necessary driving capability for image output.
2Use of energy by moving object
If charge sharing function is implemented to reduce power consumption, then power usage decreases, but manual channel designation is required which reduces ease of operation
Solution Approach 1:
The gate driver circuit automatically selects buffers for charge sharing based on the clock signal phase without external intervention. The control circuit monitors the clock signal and autonomously activates the charge sharing function, allowing the system to self-regulate power consumption while maintaining proper gate line driving for normal image output.
Solution Approach 2:
The charge sharing function transitions from a static, manually-configured system to a dynamic, automatically-controlled system that adapts to the clock signal phase. This dynamic operation eliminates the need for manual channel designation while optimizing power consumption in real-time.
3Ease of operation
If charge sharing is automatically applied based on clock signal phase, then ease of operation improves, but device complexity increases
Solution Approach 1:
The control circuit serves multiple functions: it generates gate clock signals, monitors clock signal phase, determines buffer selection for charge sharing, and controls the timing control signals. This multi-functionality consolidates what could be separate complex circuits into a single integrated control unit, managing complexity while enabling automatic operation.
Data Source
AI summary
Provided are a gate driver circuit used in a display device and a method for driving the same. Charge sharing is adaptively achieved according to the phase of a clock signal outputted by the output ends of buffers in the gate driver circuit, so that power consumed when a gate line is driven can be reduced.