Gate Driver ADC Sampling Without Switching Trigger Points
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Solution Overview
Problem
Existing gate driver circuits rely solely on triggering points of switching signals, leading to incomplete data sampling when the switching signal stops, which affects the accuracy of system monitoring.
Innovation Solution
A gate driver circuit that uses both a switching signal and a timing signal to control analog-to-digital converters (ADCs), allowing continuous data sampling even when the switching signal is inactive, and employs a readout counter value to validate data samples.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the system relies solely on triggering points of the switching signal for data sampling, then the device complexity is reduced, but the measurement precision and reliability of system monitoring deteriorate when the switching signal stops
Solution Approach 1:
The patent introduces a timing signal as an intermediary mechanism that operates independently of the switching signal. This timing signal serves as a mediator to trigger ADC sampling during intervals when the switching signal is inactive, ensuring continuous monitoring without requiring complex modifications to the original switching control logic.
Solution Approach 2:
The gate driver circuit is enhanced to perform multiple functions: it continues to respond to switching signal triggering points for normal operation while simultaneously responding to timing signal triggers for continuous monitoring. This multi-functionality allows the same circuit to maintain both simplicity and high measurement precision under different operating conditions.
2Ease of operation
If the system uses only switching signal triggering points for ADC sampling, then the ease of operation is maintained, but the quantity of data samples is insufficient for accurate system state determination
Solution Approach 1:
The patent implements continuous useful action by ensuring that ADC sampling occurs continuously through two complementary triggering mechanisms. The switching signal provides sampling during active operation, while the timing signal provides sampling during inactive periods, eliminating gaps in data collection and maintaining continuous monitoring capability.
3Manufacturing precision
If the system relies on timestamp comparison for data validation, then the manufacturing precision is maintained, but the computational burden increases significantly
Solution Approach 1:
The patent employs a simple counter mechanism that increments with each valid data sample and can be easily reset after use. This disposable-style counter approach provides accurate data validation without the computational overhead of timestamp comparison, as the counter requires minimal processing power and can be implemented with simple logic circuitry.
Data Source
AI summary
A gate driver circuit includes one or more datastores configured to store one or more result registers, timer circuitry configured to generate a timing signal, and logic circuitry. The logic circuitry is configured to drive switching circuitry using a switching signal and determine a triggering point of a first cycle of the switching signal. In response to the determination of the triggering point, the logic circuitry is configured to control, using the switching signal, one or more analog-to-digital converters (ADCs) to store a first data sample at the one or more result registers. In response to a determination that the switching signal does not include a triggering point, the logic circuitry is configured to control, using the timing signal, the one or more ADCs to store a second data sample at the one or more result registers.