Gate Driver On Array Circuit Leakage Current Control
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Solution Overview
Problem
Conventional gate driver on array circuits in LCDs face challenges in controlling the leakage current of thin film transistors, which affects the display quality due to high voltage differences between the gate and source when the scanning circuit is turned off.
Innovation Solution
The introduction of a second low-level signal in the gate driver on array unit reduces the voltage difference between the gate and source of thin film transistors by using a second low-level voltage, thereby decreasing the leakage current and improving control accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional driver circuit with single Vss signal is used, then circuit complexity is reduced, but leakage current of thin film transistor increases and cannot be controlled precisely
Solution Approach 1:
The patent introduces a second low-level signal Vss2 with a lower voltage level than the conventional Vss signal. By changing the voltage level parameter of the low-level signal, the patent reduces the Vgs voltage difference of the thin film transistor when turned off, thereby reducing leakage current and improving control precision without significantly increasing circuit complexity
Solution Approach 2:
The patent divides the conventional single low-level signal into two separate low-level signals (Vss and Vss2) with different voltage levels. This segmentation allows different parts of the circuit to use appropriate voltage levels for their specific functions, with Vss2 used specifically for reducing leakage current in the thin film transistor at the output terminal
2Loss of energy
If scanning circuit is turned off for longer duration, then power consumption is reduced, but stability requirement of thin film transistor increases
Solution Approach 1:
By introducing the second low-level signal Vss2 with a lower voltage level, the patent changes the off-state voltage parameter of the thin film transistor. This allows the transistor to maintain better stability characteristics during the extended off-period, enabling longer off-duration for power savings while meeting stability requirements
Data Source
AI summary
The present invention provides a gate driver on array circuit. The gate driver on array circuit comprises: multiple gate driver on array units connected in cascade. The n-th gate driver on array unit of the gate driver on array circuit comprises a (n−2)-th signal input terminal 21, a (n+2)-th signal input terminal 22, a clock signal first input terminal 23, a clock signal second input terminal 24, a first low-level input terminal 25, a second low-level input terminal 26, a first output terminal 27 and a second output terminal 28. The n-th gate driver on array unit further comprises: a pulling-up driving unit 32, a pulling-up unit 34, a first to a third pulling-down unit 36, 37, 38. The present invention adds a second low-level signal, which uses the second low-level to decrease the voltage difference (Vgs) between the gate and the source of the thin film transistor of the first output terminal, so that the leakage current of the thin film transistor is less and can be controlled precisely.