Display Gate Driver Back-Gate Biasing for Leakage Control
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Solution Overview
Problem
Existing gate drivers in display devices suffer from reliability issues due to high leakage currents in always-on transistors, which can lead to increased voltage levels and reduced margin in gate signals.
Innovation Solution
The gate driver design includes a P-type transistor with a back gate configuration, where a high voltage is applied to the back gate of an always-on transistor, negatively shifting its threshold voltage and reducing leakage current, thereby maintaining stable gate signal levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a constant voltage level is applied to the gate of the always-on transistor to maintain it in a turned-on state, then the transistor remains continuously conductive, but high leakage currents occur
Solution Approach 1:
The patent applies a back gate voltage to the always-on transistor to dynamically adjust its threshold voltage. By changing the electrical parameter (threshold voltage) through back gate control, the transistor can maintain continuous conductivity while reducing leakage current, as the threshold voltage is shifted to optimize both conduction and leakage characteristics simultaneously
2Reliability
If high leakage current flows in the always-on transistor, then the transistor remains conductive, but the voltage level increases and margin in gate signals is reduced
Solution Approach 1:
The back gate voltage applied to the always-on transistor modifies its threshold voltage parameter, enabling the transistor to operate with reduced leakage current. This parameter adjustment ensures that the gate signal maintains adequate voltage margin while the transistor remains reliably conductive, resolving the trade-off between signal margin and leakage current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces leakage current in the always-on transistor, ensuring stable gate signal levels and enhancing the reliability of the gate driver.
Implementation Method 1
a threshold voltage of the fourth transistor may be negatively shifted in a period in which the first control node or the second control node of the k−1th stage has the high gate voltage and the inverting control node of the k+1th stage has the low gate voltage
Data Source
AI summary
A gate driver includes first to nth stages. A kth stage among the first to nth stages includes a first transistor including a second terminal electrically connected to a first control node, a fifth transistor including a gate electrically connected to an inverting control node, a sixth transistor including a gate electrically connected to a second control node, a fourth transistor including a gate which receives a low gate voltage, a first terminal electrically connected to a first control node, a second terminal electrically connected to a second control node, and a back gate, and a seventh transistor including a gate which receives a voltage of the inverting control node of a k+1th stage, a first terminal which receives a voltage of the first control node or the second control node of a k−1th stage, and a second terminal electrically connected to the back gate of the fourth transistor.