Gate Driver Buffer Configuration for Narrow Bezel Displays
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Solution Overview
Problem
Conventional gate drivers occupy a large area on display panels due to the number of shift registers required, leading to a widened bezel and instability in gate signal output due to charging and discharging issues of pull-up transistors.
Innovation Solution
A gate driver configuration with multiple buffers connected to a single shift register, utilizing transistors to control and stabilize the charging and discharging of gate voltages, reducing the number of shift registers and ensuring uniform and stable gate signal output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple shift registers are used to drive multiple gate lines, then each gate line can be driven independently, but the gate driver occupies a large area leading to widened bezel
Solution Approach 1:
The patent merges multiple shift register functions into a single shift register by connecting multiple buffers to one shift register. The single shift register sequentially outputs signals to multiple buffers, which then drive different gate lines. This consolidation reduces the number of shift registers from multiple to one, significantly reducing the gate driver area and enabling narrow bezel design while maintaining independent gate line driving capability through the buffer structure.
2Power
If pull-up transistors are used in buffers to output clock signals, then gate signals can be amplified, but charging and discharging issues cause instability in gate signal output
Solution Approach 1:
The patent introduces a dedicated control transistor as an intermediary between the pull-up transistor and the Q node. This control transistor mediates the charging process by precisely controlling when charge is transferred to the pull-up transistor's gate. The mediation ensures stable charging without overcharging or charging instability, allowing the pull-up transistor to provide strong gate signal output while maintaining signal stability through controlled charge transfer.
3Area of stationary object
If a single shift register drives multiple buffers, then the gate driver area is reduced, but the charging and discharging control of buffer nodes becomes more complex
Solution Approach 1:
The patent segments the control functions by introducing dedicated control transistors for each buffer stage. Each buffer has its own control transistor that independently manages the charging of the Q node to the pull-up transistor. This segmentation simplifies the control logic for each individual buffer while allowing sequential operation across multiple buffers, reducing the overall complexity compared to a fully integrated control scheme.
Data Source
AI summary
Proposed is a gate driver and a display device having the same. The gate driver includes a plurality of stage circuits, wherein each of the plurality of stage circuits includes a shift register configured to control charging and discharging of a Q node and a QB node, and a plurality of output buffers sequentially connected to the shift register, wherein each of the output buffers includes a first transistor configured to transmit a voltage of the Q node to a Q′ node, a pull-up transistor configured to output a clock signal to a gate line in response to a voltage of the Q′ node, and a pull-down transistor configured to output a low-potential voltage to the gate line in response to a voltage of the QB node.