Gate Driver Charge Sharing to Mitigate LCD Falling-Edge Coupling
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Solution Overview
Problem
Existing gate drivers for LCD displays suffer from image distortion due to falling-edge coupling effects caused by parasitic capacitors, which existing technologies have not adequately addressed without complex control circuits.
Innovation Solution
A gate driver design that includes a logic circuit generating buffer input signals and a modulation signal, along with a switch module that controls the connection between voltage sources to modulate gate driving signals by enabling charge sharing among load modules, thereby smoothing the waveforms and reducing the falling-edge coupling effect.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional gate drivers generate square wave gate driving signals, then the gate driver can sequentially activate TFTs row by row, but parasitic capacitors cause falling-edge coupling effects that distort image contents stored in equivalent capacitors
Solution Approach 1:
The gate driver performs preliminary action by raising the gate voltage above the normal high level VGH before the falling edge occurs. This pre-raising action ensures that even when the voltage drops at the falling edge, the gate voltage remains above the threshold voltage required to keep TFTs turned on, thereby preventing the harmful coupling effect from distorting the image contents stored in equivalent capacitors while maintaining the square wave activation capability
2Object-affected harmful factors
If complex control circuits are added to moderate falling edges of gate driving signals, then falling-edge coupling effect can be reduced, but device complexity and power consumption increase
Solution Approach 1:
The invention merges the falling-edge moderation function into the existing buffer circuitry by adding a simple voltage selection mechanism. Instead of introducing separate complex control circuits, the solution combines the voltage raising function with the existing gate driving buffer, using a voltage generator to provide either normal high level VGH or raised high level VGH_RISE based on a control signal. This integration approach reduces device complexity while effectively moderating the falling edges to prevent image distortion
Solution Approach 2:
The invention applies parameter changes by modifying the voltage level parameter of the gate driving signal. Instead of changing the waveform shape or adding complex timing control, the solution simply changes the voltage parameter from normal high level VGH to raised high level VGH_RISE during specific periods. This parameter-based approach effectively moderates the falling edge effect while keeping the control circuit simple and power consumption low
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively mitigates image distortion and falling-edge coupling without requiring additional complex control circuits, achieving an economic and power-efficient modulation of gate driving signals by reshaping the waveforms of the gate driving signals.
Implementation Method 1
a modulation signal causes the switch module to be cut-off, and the plurality of buffer input signals are configured to short all or some of a plurality of output terminals, so as to modulate the gate driving signals
Data Source
AI summary
A gate driver includes a logic circuit for generating a plurality of buffer input signals and a modulation signal, a plurality of buffers each for generating a respective gate driving signal according to a corresponding one of the plurality of buffer input signals, and a switch module for controlling electrical connection between a first voltage source and the plurality of buffers. During a modulation period, the modulation signal indicates the switch module to break the electrical connection, and the plurality of buffer input signals are configured to short output terminals of the plurality of buffers so as to modulate the gate driving signals.